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lustre-v6
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verimag
synchrone
lustre-v6
Commits
ed439b11
Commit
ed439b11
authored
6 years ago
by
Erwan Jahier
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issue
#6
fixed!
parent
35da0af5
Branches
6-can-not-iterate-over-the-plus-node-as-long-as-it-is-named-plus
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1 merge request
!1
WIP: Resolve "Can not iterate over the plus node (as long as it is named plus)"
Pipeline
#9504
passed
6 years ago
Stage: build
Stage: test
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1
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src/l2lExpandMetaOp.ml
+4
-3
4 additions, 3 deletions
src/l2lExpandMetaOp.ml
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and
3 deletions
src/l2lExpandMetaOp.ml
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ed439b11
(** Time-stamp: <modified the
2
0/0
2
/201
7
(at
11:30
) by Erwan Jahier> *)
(** Time-stamp: <modified the 0
4
/0
7
/201
8
(at
09:59
) by Erwan Jahier> *)
open
Lxm
open
Lxm
open
Lic
open
Lic
...
@@ -334,11 +334,12 @@ let (create_map_body: local_ctx -> Lic.static_arg list -> Lic.node_body * var_in
...
@@ -334,11 +334,12 @@ let (create_map_body: local_ctx -> Lic.static_arg list -> Lic.node_body * var_in
let
cl
=
let
cl
=
List
.
map
(
fun
l
->
snd
(
Lic
.
var_info_of_left
l
)
.
var_clock_eff
)
lhs
List
.
map
(
fun
l
->
snd
(
Lic
.
var_info_of_left
l
)
.
var_clock_eff
)
lhs
in
in
let
p
,
n
=
fst
iter_node
.
it
in
let
rhs
=
{
let
rhs
=
{
ve_typ
=
List
.
map
Lic
.
type_of_left
lhs
;
ve_typ
=
List
.
map
Lic
.
type_of_left
lhs
;
ve_clk
=
cl
;
ve_clk
=
cl
;
ve_core
=
ve_core
=
if
AstPredef
.
is_a_predef_op
(
snd
(
fst
iter_node
.
it
))
then
if
p
=
"Lustre"
&&
AstPredef
.
is_a_predef_op
n
then
CallByPosLic
({
src
=
lxm
;
it
=
(
Lic
.
PREDEF_CALL
iter_node
)}
,
xi_j
)
CallByPosLic
({
src
=
lxm
;
it
=
(
Lic
.
PREDEF_CALL
iter_node
)}
,
xi_j
)
else
else
CallByPosLic
({
src
=
lxm
;
it
=
(
CALL
iter_node
)}
,
xi_j
);
CallByPosLic
({
src
=
lxm
;
it
=
(
CALL
iter_node
)}
,
xi_j
);
...
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