Skip to content
Snippets Groups Projects
Select Git revision
  • fetch-skips-hardening
  • master default protected
  • cgo24_1
  • gdb-13-branchpoint
  • gdb_7_6-branchpoint
  • gdb_7_5-branchpoint
  • gdb_7_4-branchpoint
  • gdb_7_3-branchpoint
  • gdb_7_2-branchpoint
  • gdb_7_1-branchpoint
  • gdb_7_0-branchpoint
  • gdb_6_8-branchpoint
  • gdb_6_7-branchpoint
  • gdb_6_6-branchpoint
  • gdb_6_5-branchpoint
  • gdb_6_4-branchpoint
  • gdb_6_3-branchpoint
  • gdb_6_2-branchpoint
  • gdb_6_1-branchpoint
  • gdb_6_0-branchpoint
  • gdb_5_3-branchpoint
  • gdb_5_2-branchpoint
22 results
Compare
user avatar
x86: have insns acting on segment selector values allow for consistent operands
Jan Beulich authored 
While MOV to/from segment register as well as selector storing insns
already permit 32- and 64-bit GPR operands, selector loading insns and
ARPL do not. Split templates accordingly.
5eeeafe0
History
user avatar 5eeeafe0
History
Name Last commit Last update
..