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Commit 5eeeafe0 authored by Jan Beulich's avatar Jan Beulich
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x86: have insns acting on segment selector values allow for consistent operands 

While MOV to/from segment register as well as selector storing insns
already permit 32- and 64-bit GPR operands, selector loading insns and
ARPL do not. Split templates accordingly.
parent c34d1cc9
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