xstormy16.cpu

     ()
     ("movf$ws2 ($Rb,--$Rs,$imm12),$Rdm")
     (+ OP1_6 OP2A_E ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12)
     (sequence ()
	       ; Note - despite the XStormy16 ISA documentation the
	       ; subtraction *is* propogated into the base register.
	       (if (eq Rs 0) (set Rb (sub Rb 1)))
	       (set Rs (sub Rs (add ws2 1)))
	       (set-psw-nowrite (index-of Rdm) Rdm ws2)
	       (if ws2
		   (set (mem HI (and (add (join SI HI Rb Rs) imm12) #xFFFFFFFE)) Rdm)
		   (set (mem QI (add (join SI HI Rb Rs) imm12)) Rdm)))
     ()
)

(dni maskgrgr
     "Mask insert controlled by general register"
     ()
     ("mask $Rd,$Rs")
     (+ OP1_3 OP2_3 Rs Rd)
     (set-psw Rd (index-of Rd) (or HI (and HI Rd (inv HI Rs)) (and (reg HI h-gr Rpsw) Rs)) 1)
     ()
)

(dni maskgrimm16
     "Mask insert controlled by immediate value"
     ()
     ("mask $Rd,#$imm16")
     (+ OP1_3 OP2_0 OP3_E Rd imm16)
     (set-psw Rd (index-of Rd) (or (and Rd (inv imm16)) (and (reg HI h-gr Rpsw) imm16)) 1)
     ()
)

; Push, Pop
(dni pushgr
     "Push register"
     ()
     ("push $Rd")
     (+ OP1_0 OP2_0 OP3_8 Rd)
     (sequence ()
	       (set (mem HI sp) Rd)
	       (set sp (add sp 2)))
     ()
)

(dni popgr
     "Pop into a register"
     ()
     ("pop $Rd")
     (+ OP1_0 OP2_0 OP3_9 Rd)
     (sequence ()
	       (set sp (add sp -2))
	       (set Rd (mem HI sp)))
     ()
)

; Swap
(dni swpn
     "Swap low nibbles"
     ()
     ("swpn $Rd")
     (+ OP1_3 OP2_0 OP3_9 Rd)
     (set-psw Rd (index-of Rd) (or (or (and (sll Rd 4) #xF0)
			 (and (srl Rd 4) #x0F))
		     (and Rd #xFF00)) 0)
     ()
)

(dni swpb
     "Swap bytes"
     ()
     ("swpb $Rd")
     (+ OP1_3 OP2_0 OP3_8 Rd)
     (set-psw Rd (index-of Rd) (or (sll Rd 8) (srl Rd 8)) 1)
     ()
)

(dni swpw
     "Swap words"
     ()
     ("swpw $Rd,$Rs")
     (+ OP1_3 OP2_2 Rs Rd)
     (sequence ((HI foo))
	       (set foo Rs)
	       (set Rs Rd)
	       (set-psw Rd (index-of Rd) foo 1))
     ()
)

; Logical Operations
(dni andgrgr
     "AND general register with general register"
     ()
     ("and $Rd,$Rs")
     (+ OP1_4 OP2_0 Rs Rd)
     (set-psw Rd (index-of Rd) (and Rd Rs) 1)
     ()
)

(dni andimm8
     "AND with 8-bit immediate"
     ()
     ("and Rx,#$imm8")
     (+ OP1_4 OP2_1 imm8)
     (set-psw (reg HI h-gr Rpsw) Rpsw (and (reg HI h-gr Rpsw) imm8) 1)
     ()
)

(dni andgrimm16
     "AND general register with 16-bit immediate"
     ()
     ("and $Rd,#$imm16")
     (+ OP1_3 OP2_1 OP3_0 Rd imm16)
     (set-psw Rd (index-of Rd) (and Rd imm16) 1)
     ()
)

(dni orgrgr
     "OR general register with general register"
     ()
     ("or $Rd,$Rs")
     (+ OP1_4 OP2_2 Rs Rd)
     (set-psw Rd (index-of Rd) (or Rd Rs) 1)
     ()
)

(dni orimm8
     "OR with 8-bit immediate"
     ()
     ("or Rx,#$imm8")
     (+ OP1_4 OP2_3 imm8)
     (set-psw (reg HI h-gr Rpsw) Rpsw (or (reg HI h-gr Rpsw) imm8) 1)
     ()
)

(dni orgrimm16
     "OR general register with 16-bit immediate"
     ()
     ("or $Rd,#$imm16")
     (+ OP1_3 OP2_1 OP3_1 Rd imm16)
     (set-psw Rd (index-of Rd) (or Rd imm16) 1)
     ()
)

(dni xorgrgr
     "XOR general register with general register"
     ()
     ("xor $Rd,$Rs")
     (+ OP1_4 OP2_4 Rs Rd)
     (set-psw Rd (index-of Rd) (xor Rd Rs) 1)
     ()
)

(dni xorimm8
     "XOR with 8-bit immediate"
     ()
     ("xor Rx,#$imm8")
     (+ OP1_4 OP2_5 imm8)
     (set-psw (reg HI h-gr Rpsw) Rpsw (xor (reg HI h-gr Rpsw) imm8) 1)
     ()
)

(dni xorgrimm16
     "XOR general register with 16-bit immediate"
     ()
     ("xor $Rd,#$imm16")
     (+ OP1_3 OP2_1 OP3_2 Rd imm16)
     (set-psw Rd (index-of Rd) (xor Rd imm16) 1)
     ()
)

(dni notgr
     "NOT general register"
     ()
     ("not $Rd")
     (+ OP1_3 OP2_0 OP3_B Rd)
     (set-psw Rd (index-of Rd) (inv Rd) 1)
     ()
)

; Arithmetic operations
(dni addgrgr
     "ADD general register to general register"
     ()
     ("add $Rd,$Rs")
     (+ OP1_4 OP2_9 Rs Rd)
     (set-psw-add Rd (index-of Rd) Rd Rs 0)
     ()
)

(dni addgrimm4
     "ADD 4-bit immediate to general register"
     ()
     ("add $Rd,#$imm4")
     (+ OP1_5 OP2_1 imm4 Rd)
     (set-psw-add Rd (index-of Rd) Rd imm4 0)
     ()
)

(dni addimm8
     "ADD 8-bit immediate"
     ()
     ("add Rx,#$imm8")
     (+ OP1_5 OP2_9 imm8)
     (set-psw-add (reg HI h-gr Rpsw) Rpsw (reg HI h-gr Rpsw) imm8 0)
     ()
)

(dni addgrimm16
     "ADD 16-bit immediate to general register"
     ()
     ("add $Rd,#$imm16")
     (+ OP1_3 OP2_1 OP3_4 Rd imm16)
     (set-psw-add Rd (index-of Rd) Rd imm16 0)
     ()
)

(dni adcgrgr
     "ADD carry and general register to general register"
     ()
     ("adc $Rd,$Rs")
     (+ OP1_4 OP2_B Rs Rd)
     (set-psw-add Rd (index-of Rd) Rd Rs psw-cy)
     ()
)

(dni adcgrimm4
     "ADD carry and 4-bit immediate to general register"
     ()
     ("adc $Rd,#$imm4")
     (+ OP1_5 OP2_3 imm4 Rd)
     (set-psw-add Rd (index-of Rd) Rd imm4 psw-cy)
     ()
)

(dni adcimm8
     "ADD carry and 8-bit immediate"
     ()
     ("adc Rx,#$imm8")
     (+ OP1_5 OP2_B imm8)
     (set-psw-add (reg HI h-gr Rpsw) Rpsw (reg HI h-gr Rpsw) imm8 psw-cy)
     ()
)

(dni adcgrimm16
     "ADD carry and 16-bit immediate to general register"
     ()
     ("adc $Rd,#$imm16")
     (+ OP1_3 OP2_1 OP3_5 Rd imm16)
     (set-psw-add Rd (index-of Rd) Rd imm16 psw-cy)
     ()
)

(dni subgrgr
     "SUB general register from general register"
     ()
     ("sub $Rd,$Rs")
     (+ OP1_4 OP2_D Rs Rd)
     (set-psw-sub Rd (index-of Rd) Rd Rs 0)
     ()
)

(dni subgrimm4
     "SUB 4-bit immediate from general register"
     ()
     ("sub $Rd,#$imm4")
     (+ OP1_5 OP2_5 imm4 Rd)
     (set-psw-sub Rd (index-of Rd) Rd imm4 0)
     ()
)

(dni subimm8
     "SUB 8-bit immediate"
     ()
     ("sub Rx,#$imm8")
     (+ OP1_5 OP2_D imm8)
     (set-psw-sub (reg HI h-gr Rpsw) Rpsw (reg HI h-gr Rpsw) imm8 0)
     ()
)

(dni subgrimm16
     "SUB 16-bit immediate from general register"
     ()
     ("sub $Rd,#$imm16")
     (+ OP1_3 OP2_1 OP3_6 Rd imm16)
     (set-psw-sub Rd (index-of Rd) Rd imm16 0)
     ()
)

(dni sbcgrgr
     "SUB carry and general register from general register"
     ()
     ("sbc $Rd,$Rs")
     (+ OP1_4 OP2_F Rs Rd)
     (set-psw-sub Rd (index-of Rd) Rd Rs psw-cy)
     ()
)

(dni sbcgrimm4
     "SUB carry and 4-bit immediate from general register"
     ()
     ("sbc $Rd,#$imm4")
     (+ OP1_5 OP2_7 imm4 Rd)
     (set-psw-sub Rd (index-of Rd) Rd imm4 psw-cy)
     ()
)

(dni sbcgrimm8
     "SUB carry and 8-bit immediate"
     ()
     ("sbc Rx,#$imm8")
     (+ OP1_5 OP2_F imm8)
     (set-psw-sub (reg HI h-gr Rpsw) Rpsw (reg HI h-gr Rpsw) imm8 psw-cy)
     ()
)

(dni sbcgrimm16
     "SUB carry and 16-bit immediate from general register"
     ()
     ("sbc $Rd,#$imm16")
     (+ OP1_3 OP2_1 OP3_7 Rd imm16)
     (set-psw-sub Rd (index-of Rd) Rd imm16 psw-cy)
     ()
)

(dnmi incgr
     "Increment general register"
     ()
     ("inc $Rd")
     (emit incgrimm2 Rd (imm2 0))
)

(dni incgrimm2
     "Increment general register by 2-bit immediate"
     ()
     ("inc $Rd,#$imm2")
     (+ OP1_3 OP2_0 OP3A_0 imm2 Rd)
     (set-psw Rd (index-of Rd) (add Rd (add imm2 1)) 1)
     ()
)

(dnmi decgr
     "Decrement general register"
     ()
     ("dec $Rd")
     (emit decgrimm2 Rd (imm2 0))
)

(dni decgrimm2
     "Decrement general register by 2-bit immediate"
     ()
     ("dec $Rd,#$imm2")
     (+ OP1_3 OP2_0 OP3A_1 imm2 Rd)
     (set-psw Rd (index-of Rd) (sub Rd (add imm2 1)) 1)
     ()
)

; Logical Shift
(dni rrcgrgr
     "Rotate right general register by general register"
     ()
     ("rrc $Rd,$Rs")
     (+ OP1_3 OP2_8 Rs Rd)
     (set-psw-rrotate17 Rd (index-of Rd) Rd psw-cy Rs)
     ()
)

(dni rrcgrimm4
     "Rotate right general register by immediate"
     ()
     ("rrc $Rd,#$imm4")
     (+ OP1_3 OP2_9 imm4 Rd)
     (set-psw-rrotate17 Rd (index-of Rd) Rd psw-cy imm4)
     ()
)

(dni rlcgrgr
     "Rotate left general register by general register"
     ()
     ("rlc $Rd,$Rs")
     (+ OP1_3 OP2_A Rs Rd)
     (set-psw-rotate17 Rd (index-of Rd) Rd psw-cy (and Rs #xF))
     ()
)

(dni rlcgrimm4
     "Rotate left general register by immediate"
     ()
     ("rlc $Rd,#$imm4")
     (+ OP1_3 OP2_B imm4 Rd)
     (set-psw-rotate17 Rd (index-of Rd) Rd psw-cy imm4)
     ()
)

(dni shrgrgr
     "Shift right general register by general register"
     ()
     ("shr $Rd,$Rs")
     (+ OP1_3 OP2_C Rs Rd)
     (set-psw-carry Rd (index-of Rd) 
		    (srl Rd (and Rs #xF)) 
		    (and SI (if SI (eq (and Rs #xF) 0)
			     psw-cy
			     (srl Rd (sub (and Rs #xF) 1)))
			 1) 1)
     ()
)

(dni shrgrimm
     "Shift right general register by immediate"
     ()
     ("shr $Rd,#$imm4")
     (+ OP1_3 OP2_D imm4 Rd)
     (set-psw-carry Rd (index-of Rd) 
		    (srl Rd imm4) 
		    (and SI (if SI (eq imm4 0)
			     psw-cy
			     (srl Rd (sub imm4 1)))
			 1) 1)
     ()
)

(dni shlgrgr
     "Shift left general register by general register"
     ()
     ("shl $Rd,$Rs")
     (+ OP1_3 OP2_E Rs Rd)
     (set-psw-carry Rd (index-of Rd) 
		    (sll Rd (and Rs #xF)) 
		    (srl SI (if SI (eq (and Rs #xF) 0)
			     (sll psw-cy 15)
			     (sll Rd (sub (and Rs #xF) 1)))
			 15) 1)
     ()
)

(dni shlgrimm
     "Shift left general register by immediate"
     ()
     ("shl $Rd,#$imm4")
     (+ OP1_3 OP2_F imm4 Rd)
     (set-psw-carry Rd (index-of Rd) 
		    (sll Rd imm4) 
		    (srl SI (if SI (eq imm4 0)
			     (sll psw-cy 15)
			     (sll Rd (sub imm4 1)))
			 15) 1)
     ()
)

(dni asrgrgr
     "Arithmetic shift right general register by general register"
     ()
     ("asr $Rd,$Rs")
     (+ OP1_3 OP2_6 Rs Rd)
     (set-psw-carry Rd (index-of Rd) 
		    (sra HI Rd (and Rs #xF)) 
		    (and SI (if SI (eq (and Rs #xF) 0)
			     psw-cy
			     (srl Rd (sub (and Rs #xF) 1)))
			 1) 1)
     ()
)

(dni asrgrimm
     "Arithmetic shift right general register by immediate"
     ()
     ("asr $Rd,#$imm4")
     (+ OP1_3 OP2_7 imm4 Rd)
     (set-psw-carry Rd (index-of Rd) 
		    (sra HI Rd imm4) 
		    (and SI (if SI (eq imm4 0)
			     psw-cy
			     (srl Rd (sub imm4 1)))
			 1) 1)
     ()
)

; Bitwise operations
(dni set1grimm
     "Set bit in general register by immediate"
     ()
     ("set1 $Rd,#$imm4")
     (+ OP1_0 OP2_9 imm4 Rd)
     (set-psw Rd (index-of Rd) (or Rd (sll 1 imm4)) 1)
     ()
)

(dni set1grgr
     "Set bit in general register by general register"
     ()
     ("set1 $Rd,$Rs")
     (+ OP1_0 OP2_B Rs Rd)
     (set-psw Rd (index-of Rd) (or Rd (sll 1 (and Rs #xF))) 1)
     ()
)

(dni set1lmemimm
     "Set bit in low memory by immediate"
     ()
     ("set1 $lmem8,#$imm3")
     (+ OP1_E imm3 OP2M_1 lmem8)
     (set-mem-psw (mem QI lmem8) (or (mem QI lmem8) (sll 1 imm3)) 0)
     ()
)
(dni set1hmemimm
     "Set bit in high memory by immediate"
     ()
     ("set1 $hmem8,#$imm3")
     (+ OP1_F imm3 OP2M_1 hmem8)
     (set-mem-psw (mem QI hmem8) (or (mem QI hmem8) (sll 1 imm3)) 0)
     ()
)

(dni clr1grimm
     "Clear bit in general register by immediate"
     ()
     ("clr1 $Rd,#$imm4")
     (+ OP1_0 OP2_8 imm4 Rd)
     (set-psw Rd (index-of Rd) (and Rd (inv (sll 1 imm4))) 1)
     ()
)

(dni clr1grgr
     "Clear bit in general register by general register"
     ()
     ("clr1 $Rd,$Rs")
     (+ OP1_0 OP2_A Rs Rd)
     (set-psw Rd (index-of Rd) (and Rd (inv (sll 1 (and Rs #xF)))) 1)
     ()
)

(dni clr1lmemimm
     "Clear bit in low memory"
     ()
     ("clr1 $lmem8,#$imm3")
     (+ OP1_E imm3 OP2M_0 lmem8)
     (set-mem-psw (mem QI lmem8) (and (mem QI lmem8) (inv (sll 1 imm3))) 0)
     ()
)
(dni clr1hmemimm
     "Clear bit in high memory"
     ()
     ("clr1 $hmem8,#$imm3")
     (+ OP1_F imm3 OP2M_0 hmem8)
     (set-mem-psw (mem QI hmem8) (and (mem QI hmem8) (inv (sll 1 imm3))) 0)
     ()
)

; Data conversion

(dni cbwgr
     "Sign-extend byte in general register"
     ()
     ("cbw $Rd")
     (+ OP1_3 OP2_0 OP3_A Rd)
     (set-psw Rd (index-of Rd) (ext HI (trunc QI Rd)) 1)
     ()
)

(dni revgr
     "Reverse bit pattern in general register"
     ()
     ("rev $Rd")
     (+ OP1_3 OP2_0 OP3_F Rd)
     (set-psw Rd (index-of Rd)
       (or (sll (and Rd #x0001) 15)
       (or (sll (and Rd #x0002) 13)
       (or (sll (and Rd #x0004) 11)
       (or (sll (and Rd #x0008) 9)
       (or (sll (and Rd #x0010) 7)
       (or (sll (and Rd #x0020) 5)
       (or (sll (and Rd #x0040) 3)
       (or (sll (and Rd #x0080) 1)
       (or (srl (and Rd #x0100) 1)
       (or (srl (and Rd #x0200) 3)
       (or (srl (and Rd #x0400) 5)
       (or (srl (and Rd #x0800) 7)
       (or (srl (and Rd #x1000) 9)
       (or (srl (and Rd #x2000) 11)
       (or (srl (and Rd #x4000) 13)
           (srl (and Rd #x8000) 15))))))))))))))))
       1)
     ()
)

; Conditional Branches

(define-pmacro (cbranch cond dest)
  (sequence ((BI tmp))
	    (case cond
	      ((0)  (set tmp (not (xor psw-s psw-ov))))			; ge
	      ((1)  (set tmp (not psw-cy)))				; nc
	      ((2)  (set tmp (xor psw-s psw-ov)))			; lt
	      ((3)  (set tmp psw-cy))					; c
	      ((4)  (set tmp (not (or (xor psw-s psw-ov) psw-z16))))	; gt
	      ((5)  (set tmp (not (or psw-cy psw-z16))))		; hi
	      ((6)  (set tmp (or (xor psw-s psw-ov) psw-z16)))		; le
	      ((7)  (set tmp (or psw-cy psw-z16)))			; ls
	      ((8)  (set tmp (not psw-s)))				; pl
	      ((9)  (set tmp (not psw-ov)))				; nv
	      ((10) (set tmp psw-s))					; mi
	      ((11) (set tmp psw-ov))					; v
	      ((12) (set tmp (not psw-z8)))				; nz.b
	      ((13) (set tmp (not psw-z16)))				; nz
	      ((14) (set tmp psw-z8))					; z.b
	      ((15) (set tmp psw-z16)))					; z
	    (if tmp (set pc dest)))
)

(dni bccgrgr
     "Conditional branch comparing general register with general register"
     ()
     ("b$bcond5 $Rd,$Rs,$rel12")
     (+ OP1_0 OP2_D Rs Rd bcond5 rel12)
     (sequence ()
	       (set-psw-cmp Rd (index-of Rd) Rd Rs)
	       (cbranch bcond5 rel12))
     ()
)

; 4 bytes
(dni bccgrimm8
     "Conditional branch comparing general register with 8-bit immediate"
     ()
     ("b$bcond5 $Rm,#$imm8,$rel12")
     (+ OP1_2 OP2M_0 Rm imm8 bcond5 rel12)
     (sequence ()
	       (set-psw-cmp Rm (index-of Rm) Rm imm8)
	       (cbranch bcond5 rel12))
     ()
)

; 4 bytes
(dni bccimm16
     "Conditional branch comparing general register with 16-bit immediate"
     ()
     ("b$bcond2 Rx,#$imm16,${rel8-4}")
     (+ OP1_C bcond2 rel8-4 imm16)
     (sequence ()
	       (set-psw-cmp (reg HI h-gr Rpsw) Rpsw (reg HI h-gr Rpsw) imm16)
	       (cbranch bcond2 rel8-4))
     ()
)

(dni bngrimm4
     "Test bit in general register by immediate and branch if 0"
     ()
     ("bn $Rd,#$imm4,$rel12")
     (+ OP1_0 OP2_4 imm4 Rd OP5_0 rel12)
     (sequence ()
	       (set Rpsw (index-of Rd))
	       (if (eq (and Rd (sll 1 imm4)) 0)
		   (set pc rel12)))
     ()
)

(dni bngrgr
     "Test bit in general register by general register and branch if 0"
     ()
     ("bn $Rd,$Rs,$rel12")
     (+ OP1_0 OP2_6 Rs Rd OP5_0 rel12)
     (sequence ()
	       (set Rpsw (index-of Rd))
	       (if (eq (and Rd (sll 1 Rs)) 0)
		   (set pc rel12)))
     ()
)

(dni bnlmemimm
     "Test bit in memory by immediate and branch if 0"
     ()
     ("bn $lmem8,#$imm3b,$rel12")
     (+ OP1_7 OP2_C lmem8 OP5A_0 imm3b rel12)
     (if (eq (and (mem QI lmem8) (sll 1 imm3b)) 0)
	 (set pc rel12))
     ()
)

(dni bnhmemimm
     "Test bit in memory by immediate and branch if 0"
     ()
     ("bn $hmem8,#$imm3b,$rel12")
     (+ OP1_7 OP2_E hmem8 OP5A_0 imm3b rel12)
     (if (eq (and (mem QI hmem8) (sll 1 imm3b)) 0)
	 (set pc rel12))
     ()
)

(dni bpgrimm4
     "Test bit in general register by immediate and branch if 1"
     ()
     ("bp $Rd,#$imm4,$rel12")
     (+ OP1_0 OP2_5 imm4 Rd OP5_0 rel12)
     (sequence ()
	       (set Rpsw (index-of Rd))
	       (if (ne (and Rd (sll 1 imm4)) 0)
		   (set pc rel12)))
     ()
)

(dni bpgrgr
     "Test bit in general register by general register and branch if 1"
     ()
     ("bp $Rd,$Rs,$rel12")
     (+ OP1_0 OP2_7 Rs Rd OP5_0 rel12)
     (sequence ()
	       (set Rpsw (index-of Rd))
	       (if (ne (and Rd (sll 1 Rs)) 0)
		   (set pc rel12)))
     ()
)

(dni bplmemimm
     "Test bit in memory by immediate and branch if 1"
     ()
     ("bp $lmem8,#$imm3b,$rel12")
     (+ OP1_7 OP2_D lmem8 OP5A_0 imm3b rel12)
     (if (ne (and (mem QI lmem8) (sll 1 imm3b)) 0)
	 (set pc rel12))
     ()
)

(dni bphmemimm
     "Test bit in memory by immediate and branch if 1"
     ()
     ("bp $hmem8,#$imm3b,$rel12")
     (+ OP1_7 OP2_F hmem8 OP5A_0 imm3b rel12)
     (if (ne (and (mem QI hmem8) (sll 1 imm3b)) 0)
	 (set pc rel12))
     ()
)

(dni bcc
     "Conditional branch on flag registers"
     ()
     ("b$bcond2 ${rel8-2}")
     (+ OP1_D bcond2 rel8-2)
     (cbranch bcond2 rel8-2)
     ()
)

; Unconditional Branching

(dni bgr
     "Branch to register"
     ()
     ("br $Rd")
     (+ OP1_0 OP2_0 OP3_2 Rd)
     (set pc (add (add pc 2) Rd))
     ()
)

(dni br
     "Branch"
     ()
     ("br $rel12a")
     (+ OP1_1 rel12a OP4B_0)
     (set pc rel12a)
     ()
)

(dni jmp
     "Jump"
     ()
     ("jmp $Rbj,$Rd")
     (+ OP1_0 OP2_0 OP3B_4 Rbj Rd)
     (set pc (join SI HI Rbj Rd))
     ()
)

(dni jmpf
     "Jump far"
     ()
     ("jmpf $abs24")
     (+ OP1_0 OP2_2 abs24)
     (set pc abs24)
     ()
)

; Call instructions
(define-pmacro (do-call dest ilen)
  (sequence ()
	    (set (mem SI sp) (add pc ilen))
	    (set sp (add sp 4))
	    (set pc dest)))

(dni callrgr
     "Call relative to general register"
     ()
     ("callr $Rd")
     (+ OP1_0 OP2_0 OP3_1 Rd)
     (do-call (add Rd (add pc 2)) 2)
     ()
)

(dni callrimm
     "Call relative to immediate address"
     ()
     ("callr $rel12a")
     (+ OP1_1 rel12a OP4B_1)
     (do-call rel12a 2)
     ()
)

(dni callgr
     "Call to general registers"
     ()
     ("call $Rbj,$Rd")
     (+ OP1_0 OP2_0 OP3B_A Rbj Rd)
     (do-call (join SI HI Rbj Rd) 2)
     ()
)

(dni callfimm
     "Call far to absolute address"
     ()
     ("callf $abs24")
     (+ OP1_0 OP2_1 abs24)
     (do-call abs24 4)
     ()
)

(define-pmacro (do-calli dest ilen)
  (sequence ()
	    (set (mem SI sp) (add pc ilen))
	    (set (mem HI (add sp 4)) psw)
	    (set sp (add sp 6))
	    (set pc dest)))

(dni icallrgr
     "Call interrupt to general registers pc-relative"
     ()
     ("icallr $Rd")
     (+ OP1_0 OP2_0 OP3_3 Rd)
     (do-calli (add Rd (add pc 2)) 2)
     ()
)

(dni icallgr
     "Call interrupt to general registers"
     ()
     ("icall $Rbj,$Rd")
     (+ OP1_0 OP2_0 OP3B_6 Rbj Rd)
     (do-calli (join SI HI Rbj Rd) 2)
     ()
)

(dni icallfimm
     "Call interrupt far to absolute address"
     ()
     ("icallf $abs24")
     (+ OP1_0 OP2_3 abs24)
     (do-calli abs24 4)
     ()
)

; Return instructions
(dni iret
     "Return from interrupt"
     ()
     ("iret")
     (+ (f-op #x0002))
     (sequence ()
	       (set sp (sub sp 6))
	       (set pc (mem SI sp))
	       (set psw (mem HI (add sp 4))))
     ()
)

(dni ret
     "Return"
     ()
     ("ret")
     (+ (f-op #x0003))
     (sequence ()
	       (set sp (sub sp 4))
	       (set pc (mem SI sp)))
     ()
)

; Multiply and Divide instructions

(dni mul
     "Multiply"
     ()
     ("mul")
     (+ (f-op #x00D0))
     (sequence ((SI value))
	       (set value (mul SI (and SI R0 #xFFFF) (and SI R2 #xFFFF)))
	       (set psw (or (and psw #xFF9C)
			    (basic-psw (trunc HI value) 1)))
	       (set R0 (trunc HI value))
	       (set R1 (trunc HI (srl value 16))))
     ()
)
(dni div
     "Divide"
     ()
     ("div")
     (+ (f-op #x00C0))
     (sequence ()
	       (set R1 (umod R0 R2))
	       (set-mem-psw R0 (udiv R0 R2) 1))
     ()
)
(dni sdiv
     "Signed Divide"
     ()
     ("sdiv")
     (+ (f-op #x00C8))
     (sequence ()
	       (set R1 (mod HI R0 R2))
	       (set-mem-psw R0 (div HI R0 R2) 1))
     ()
)
(dni sdivlh
     "Divide 32/16"
     ()
     ("sdivlh")
     (+ (f-op #x00E8))
     (sequence ((SI value))
	       (set value (add SI (sll SI (and SI R1 #xffff) #x10) (and SI R0 #xffff)))
	       (set R1 (mod SI value (ext SI (trunc HI R2))))
	       (set-mem-psw R0 (div SI value (ext SI (trunc HI R2))) 1))
     ()
)
(dni divlh
     "Divide 32/16"
     ()
     ("divlh")
     (+ (f-op #x00E0))
     (sequence ((SI value))
	       (set value (add SI (sll SI (and SI R1 #xffff) #x10) (and SI R0 #xffff)))
	       (set R1 (umod SI value R2))
	       (set-mem-psw R0 (udiv SI value R2) 1))
     ()
)

; System Control

; added per sanyo's req -- eq to nop for the moment, but can 
; add function later
(dni reset "reset" () ("reset") (+ (f-op #x000f)) (nop) ())

(dni nop "nop" () ("nop") (+ (f-op #x0000)) (nop) ())

(dni halt "halt" () ("halt") (+ (f-op #x0008)) (c-call VOID "do_halt") ())

(dni hold "hold" () ("hold") (+ (f-op #x000A)) (c-call VOID "do_hold") ())

(dni holdx "holdx" () ("holdx") (+ (f-op #x000B)) (c-call VOID "do_holdx") ())

(dni brk "brk" () ("brk") (+ (f-op #x0005)) (c-call VOID "do_brk") ())

; An instruction for test instrumentation.
; Using a reserved opcode.
(dni syscall
  "simulator system call"
  ()
  ("--unused--")
  (+ (f-op #x0001))
  (c-call VOID "syscall")
  ()
)