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verimag
synchrone
sasa
Commits
bf62e502
Commit
bf62e502
authored
1 year ago
by
erwan
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fix: add a comment related to a fix that has actually been done in sha:
0e839a56
parent
878e4854
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test/async-unison/p.ml
+2
-1
2 additions, 1 deletion
test/async-unison/p.ml
test/async-unison/ring.rif.exp
+6
-57
6 additions, 57 deletions
test/async-unison/ring.rif.exp
with
8 additions
and
58 deletions
test/async-unison/p.ml
+
2
−
1
View file @
bf62e502
(* Time-stamp: <modified the
01
/0
3
/2023 (at 1
1:2
8) by Erwan Jahier> *)
(* Time-stamp: <modified the
26
/0
5
/2023 (at 1
6:5
8) by Erwan Jahier> *)
(* Bouded unison, cf Section 5 in:
...
...
@@ -15,6 +15,7 @@ let k = n * n + 1
let
(
init_state
:
int
state_init_fun
)
=
fun
_n
_
->
(
Random
.
int
k
)
(* Make sure modulo returns positive numbers (the ocaml mod does not) *)
let
modulo
x
n
=
x
mod
n
|>
fun
x
->
if
x
<
0
then
n
+
x
mod
n
else
x
let
behind
pc
qc
=
(
modulo
(
qc
-
pc
)
k
)
<=
n
...
...
This diff is collapsed.
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test/async-unison/ring.rif.exp
+
6
−
57
View file @
bf62e502
# Automatically generated by /home/jahier/.opam/4.14.0/bin/sasa version "v4.
9
.0" ("
26dce53
")
# on crevetete the 2
7/2
/2023 at 1
6:14
:54
# Automatically generated by /home/jahier/.opam/4.14.0/bin/sasa version "v4.
12
.0" ("
03b830c
")
# on crevetete the 2
6/5
/2023 at 1
7:00
:54
#sasa -l 500 ring.dot -seed 42
#seed 42
...
...
@@ -8,65 +8,14 @@
#step 0
#outs 14 5 23 3 7 5 34 f t f t f t f t f f f t f t f t f t f t f t f f f f f f f
7
. f 0
#outs 14 5 23 3 7 5 34 f t f t f t f t f f f t f t f t f t f t f t f f f f f f f
6
. f 0
#step 1
#outs 0 0 0 0 7 5 34 f f t f t f t f f f f t f t f f f f f f f f f f f f f t f
5
. f 1
#outs 0 0 0 0 7 5 34 f f t f t f t f f f f t f t f f f f f f f f f f f f f t f
3
. f 1
#step 2
#outs 0 0 0 0 7 5 0 t f t f t f t f f f f f t f f f
t
f f f f f f f f f f f
f 4
. t
2
#outs 0 0 0 0 7 5 0 t f t f t f t f f f f f t f f f f f f f f f f f f f f
t t 0
. t
1
#step 3
#outs 0 1 0 0 7 5 0 t f f f t f t f f f f f t f f f f f t f t f f f f f f f f 4. f 2
#step 4
#outs 0 1 1 1 7 5 0 t f f f t f t f f f f f t f t f f f t f f f f f f f f f f 4. f 2
#step 5
#outs 1 1 2 1 7 5 0 f f t f f f t f f f f f t f f f t f f f t f f f f f f f f 4. f 2
#step 6
#outs 1 2 2 2 7 5 0 f f f f t f t f f f f f t f f f f f f f t f f f f f f f f 4. f 2
#step 7
#outs 1 2 2 3 7 5 0 f f f f t f f f f f f f t f f f f f f f f f f f f f t f f 4. f 2
#step 8
#outs 1 2 2 3 7 5 1 t f f f t f f f f f f f t f t f f f f f f f f f f f t f f 4. t 3
#step 9
#outs 2 2 2 3 7 5 2 t f t f t f f f f f f f t f f f f f t f f f f f f f f f f 4. f 3
#step 10
#outs 2 2 3 3 7 5 2 t f t f f f t f f f f f t f t f t f f f t f f f f f t f f 4. t 4
#step 11
#outs 3 3 3 4 7 5 3 t f t f t f f f f f f f t f f f t f t f f f f f f f t f f 4. t 5
#step 12
#outs 3 4 4 4 7 5 4 t f f f t f t f f f f f f f f f f f f f t f f f f f f f f 3. f 5
#step 13
#outs 3 4 4 5 7 5 4 t f f f t f f f f f f f f f t f f f f f f f f f f f f f f 3. f 5
#step 14
#outs 4 4 4 5 7 5 4 t f t f t f f f f f f f t f f f f f t f f f f f f f f f f 3. t 6
#step 15
#outs 4 4 5 5 7 5 4 t f t f f f t f f f f f t f f f t f f f f f f f f f f f f 3. f 6
#step 16
#outs 4 5 5 5 7 5 4 t f f f t f t f f f f f t f t f f f f f f f f f f f t f f 3. f 6
#step 17
#outs 5 5 5 5 7 5 5 t f t f t f t f f f t f t f t f f f f f f f f f f f t f f 3. t 7
#step 18
#outs 6 5 5 5 7 5 6 f f t f t f t f f f t f f f f f t f t f t f f f t f f f f 3. f 7
#step 19
#outs 6 6 6 6 7 6 6 t f t f t f t f f f t f t f f f t f t f t f f f t f f f t 0. t 7
#This algo reached a legitimate configuration after 36 moves, 19 steps, 6 rounds.
#This algo reached a legitimate configuration after 5 moves, 2 steps, 0 round.
#quit
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