cpu/
	* fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
	left shift signed values.
opcodes/
	* fr30-ibld.c: Regenerate.

Another patch aimed at making binutils comply with the GNU coding
standard.  The generated files require
https://sourceware.org/ml/cgen/2018-q1/msg00004.html

cpu/
	* frv.opc: Include opintl.h.
	(add_next_to_vliw): Use opcodes_error_handler to print error.
	Standardize error message.
	(fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
opcodes/
	* sysdep.h (opcodes_error_handler): Define.
	(_bfd_error_handler): Declare.
	* Makefile.am: Remove stray #.
	* opc2c.c (main): Remove bogus -l arg handling.  Print "DO NOT
	EDIT" comment.
	* aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
	* d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
	* riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
	opcodes_error_handler to print errors.  Standardize error messages.
	* msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
	and include opintl.h.
	* nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
	* i386-gen.c: Standardize error messages.
	* msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
	* Makefile.in: Regenerate.
	* epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
	* epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
	* fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
	* frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
	* iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
	* lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
	* m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
	* m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
	* mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
	* mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
	* or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
	* xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
	* xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.

	* cgen.sh: Mark generated files read-only.
	* epiphany-asm.c: Regenerate.
	* epiphany-desc.c: Regenerate.
	* epiphany-desc.h: Regenerate.
	* epiphany-dis.c: Regenerate.
	* epiphany-ibld.c: Regenerate.
	* epiphany-opc.c: Regenerate.
	* epiphany-opc.h: Regenerate.
	* fr30-asm.c: Regenerate.
	* fr30-desc.c: Regenerate.
	* fr30-desc.h: Regenerate.
	* fr30-dis.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* fr30-opc.c: Regenerate.
	* fr30-opc.h: Regenerate.
	* frv-asm.c: Regenerate.
	* frv-desc.c: Regenerate.
	* frv-desc.h: Regenerate.
	* frv-dis.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* frv-opc.c: Regenerate.
	* frv-opc.h: Regenerate.
	* ip2k-asm.c: Regenerate.
	* ip2k-desc.c: Regenerate.
	* ip2k-desc.h: Regenerate.
	* ip2k-dis.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* ip2k-opc.c: Regenerate.
	* ip2k-opc.h: Regenerate.
	* iq2000-asm.c: Regenerate.
	* iq2000-desc.c: Regenerate.
	* iq2000-desc.h: Regenerate.
	* iq2000-dis.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* iq2000-opc.c: Regenerate.
	* iq2000-opc.h: Regenerate.
	* lm32-asm.c: Regenerate.
	* lm32-desc.c: Regenerate.
	* lm32-desc.h: Regenerate.
	* lm32-dis.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* lm32-opc.c: Regenerate.
	* lm32-opc.h: Regenerate.
	* lm32-opinst.c: Regenerate.
	* m32c-asm.c: Regenerate.
	* m32c-desc.c: Regenerate.
	* m32c-desc.h: Regenerate.
	* m32c-dis.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32c-opc.c: Regenerate.
	* m32c-opc.h: Regenerate.
	* m32r-asm.c: Regenerate.
	* m32r-desc.c: Regenerate.
	* m32r-desc.h: Regenerate.
	* m32r-dis.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* m32r-opc.c: Regenerate.
	* m32r-opc.h: Regenerate.
	* m32r-opinst.c: Regenerate.
	* mep-asm.c: Regenerate.
	* mep-desc.c: Regenerate.
	* mep-desc.h: Regenerate.
	* mep-dis.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mep-opc.c: Regenerate.
	* mep-opc.h: Regenerate.
	* mt-asm.c: Regenerate.
	* mt-desc.c: Regenerate.
	* mt-desc.h: Regenerate.
	* mt-dis.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* mt-opc.c: Regenerate.
	* mt-opc.h: Regenerate.
	* or1k-asm.c: Regenerate.
	* or1k-desc.c: Regenerate.
	* or1k-desc.h: Regenerate.
	* or1k-dis.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* or1k-opc.c: Regenerate.
	* or1k-opc.h: Regenerate.
	* or1k-opinst.c: Regenerate.
	* xc16x-asm.c: Regenerate.
	* xc16x-desc.c: Regenerate.
	* xc16x-desc.h: Regenerate.
	* xc16x-dis.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xc16x-opc.c: Regenerate.
	* xc16x-opc.h: Regenerate.
	* xstormy16-asm.c: Regenerate.
	* xstormy16-desc.c: Regenerate.
	* xstormy16-desc.h: Regenerate.
	* xstormy16-dis.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.
	* xstormy16-opc.c: Regenerate.
	* xstormy16-opc.h: Regenerate.

cpu/
	* fr30.cpu (f-m4): Replace -1 << 4 with -16.
opcodes/
	* fr30-ibld.c: Regenerate.

The calculation of the shift amount, used to insert fields into the
instruction buffer, is not correct when the following conditions are all
true:
  - CGEN_INT_INSN_P is defined, and true.
  - CGEN_INSN_LSB0_P is true
  - Total instruction length is greater than the length of a single
    instruction word (the instruction is made of multiple words)
  - The word offset is non-zero (the field is outside the first word)

When the above conditions are all true, the calculated shift fails to
take account of the total instruction length.

After this commit the calculation of the shift amount is split into two
parts, first we calculate the shift required to get to BIT0 of the word
in which the field lives, then we calculate the shift required to place
the field within the instruction word.

The change in this commit only effects the CGEN_INT_INSN_P defined true
case, but changes the code for both CGEN_INSN_LSB0_P true, and false.

In the case of CGEN_INSN_LSB0_P being false, the code used to say:

	shift = total_length - (word_offset + start + length);

Now it says:

	shift_to_word = total_length - (word_offset + word_length);
	shift_within_word = word_length - start - length;
	shift = shift_to_word + shift_within_word;

From which we can see that in all cases the computed shift value should
be unchanged.

In the case of CGEN_INSN_LSB0_P being true, the code used to say:

	shift = (word_offset + start + 1) - length;

Now it says:

	shift_to_word = total_length - (word_offset + word_length);
	shift_within_word = start + 1 - length;
	shift = shift_to_word + shift_within_word;

In the case where 'total_length == word_length' AND 'word_offset ==
0' (which indicates an instruction of a single word), we see that the
computed shift value will be unchanged.  However, when the total_length
and word_length are different, and the word_offset is non-zero then the
computed shift value will be different (and correct).

opcodes/ChangeLog:

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

bfd	* bout.c (b_out_slurp_reloc_table): Cast constant to unsigned in
	order to avoid problems with left shifting negative values.
	(abs32code): Likewise.
	* mach-o.c (FILE_ALIGN): Likewise.
	* coff-rs6000.c (xcoff_debug_sections): Delete unused static
	array.
	* elf32-visium.c (visium_reloc_map): Likewise.
	* elf32-arm.c (elf32_arm_final_link_relocate): Remove useless
	calls to abs function.
	* elf32-frv.c (_frvfdpic_relax_tls_entries): Likewise.
	* elf32-score.c (score_elf_final_link_relocate): Likewise.
	* elf32-score7.c (score_elf_final_link_relocate): Likewise.
	* elf32-i860.c (i860_howto_pc26_reloc): Use multiplication instead
	of shifting to create a negative mask.
	* elf32-msp430.c (elf_backend_special_sections): Define.
	* elfxx-mips.c (got_ofst_reloc_p): Delete unused function.
	(got_hi16_reloc_p): Delete unused function.
	* ppcboot.c (ppcboot_bfd_print_private_bfd_data): Fix test of
	partition name.

gas	* config/tc-ppc.c (insn_validate): Cast PPC_OPSHIFT_INV to an int.

opcode	* ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left
	shifting.

ld	* emultempl/elf32.em (ehdr_start_empty): New static variable.
	(before_allocation): Use it to initialise ehdr_start_save.
	* emultempl/pe.em (write_build_id): Remove useless double
	parenthesis.
	* emultempl/pep.em (write_build_id): Likewise.

opcodes	* bfin-dis.c (fmtconst): Remove unnecessary call to the abs
	function.
	* tic30-dis.c (print_branch): Likewise.
	* cgen-asm.c (cgen_parse_signed_integer): Cast integer to signed
	value before left shifting.
	* fr30-ibld.c (fr30_cgen_extract_operand): Likewise.
	* hppa-dis.c (print_insn_hppa): Likewise.
	* mips-dis.c (mips_cp0sel_names_mipsr5900): Delete unused static
	array.
	* msp430-dis.c (msp430_singleoperand): Likewise.
	(msp430_doubleoperand): Likewise.
	(print_insn_msp430): Likewise.
	* nds32-asm.c (parse_operand): Likewise.
	* sh-opc.h (MASK): Likewise.
	* v850-dis.c (get_operand_value): Likewise.

	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

	* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
	(f-dsp-40-u20, f-dsp-40-u24): Ditto.
	opcodes/
	* cgen-ibld.in: #include "cgen/basic-modes.h".
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

	* cgen-dis.in: Update copyright year.
	* cgen-ibld.in: Update copyright year.
	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.

  value into an unsigned 32-bit field when the host is a 64-bit machine.

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
	(CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.

[ opcodes/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* fr30-asm.c: Regenerate.
	* fr30-desc.c: Likewise.
	* fr30-desc.h: Likewise.
	* fr30-dis.c: Likewise.
	* fr30-ibld.c: Likewise.
	* fr30-opc.c: Likewise.
	* fr30-opc.h: Likewise.
	* m32r-asm.c: Likewise.
	* m32r-desc.c: Likewise.
	* m32r-desc.h: Likewise.
	* m32r-dis.c: Likewise.
	* m32r-ibld.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opc.h: Likewise.
	* m32r-opinst.c: Likewise.
	* openrisc-asm.c: Likewise.
	* openrisc-desc.c: Likewise.
	* openrisc-desc.h: Likewise.
	* openrisc-dis.c: Likewise.
	* openrisc-ibld.c: Likewise.
	* openrisc-opc.c: Likewise.
	* openrisc-opc.h: Likewise.
	* xstormy16-desc.c: Likewise.

[ cgen/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* desc-cpu.scm (ifld-number-cache): Add.
	(ifld-number): Add.
	(gen-maybe-multi-ifld-of-op): Add.
	(gen-maybe-multi-ifld): Add.
	(gen-multi-ifield-nodes): Add.
	(cgen-desc.c): Add call to gen-multi-ifield-nodes.

        to *VALUEP.  Regenerate all cgen files.

        * opcodes/fr30-asm.c: Regenerate.
        * opcodes/fr30-desc.c: Regenerate.
        * opcodes/fr30-desc.h: Regenerate.
        * opcodes/fr30-dis.c: Regenerate.
        * opcodes/fr30-ibld.c: Regenerate.
        * opcodes/fr30-opc.c: Regenerate.
        * opcodes/fr30-opc.h: Regenerate.
        * opcodes/m32r-asm.c: Regenerate.
        * opcodes/m32r-desc.c: Regenerate.
        * opcodes/m32r-desc.h: Regenerate.
        * opcodes/m32r-dis.c: Regenerate.
        * opcodes/m32r-ibld.c: Regenerate.
        * opcodes/m32r-opc.c: Regenerate.
        * opcodes/m32r-opc.h: Regenerate.
        * opcodes/m32r-opinst.c: Regenerate.

	* cgen-ibld.in (cgen_put_insn_int_value): New function.
	(insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
	(insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
	(extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
	* cgen-dis.in (read_insn): New static function.
	(print_insn): Use read_insn to read the insn into the buffer and set
	up for disassembly.
	(print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
	in the buffer.
	* fr30-asm.c: Regenerated.
	* fr30-desc.c: Regenerated.
	* fr30-desc.h Regenerated.
	* fr30-dis.c: Regenerated.
	* fr30-ibld.c: Regenerated.
	* fr30-opc.c: Regenerated.
	* fr30-opc.h Regenerated.
	* m32r-asm.c: Regenerated.
	* m32r-desc.c: Regenerated.
	* m32r-desc.h Regenerated.
	* m32r-dis.c: Regenerated.
	* m32r-ibld.c: Regenerated.
	* m32r-opc.c: Regenerated.

	* m32r-asm.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
	* m32r-opinst.c: Rebuild.