Skip to content
Snippets Groups Projects
  • Richard Sandiford's avatar
    c7a48b9a
    cpu/ · c7a48b9a
    Richard Sandiford authored
    	* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
    	(scutss): Change unit to I0.
    	(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
    	(mqsaths): Fix FR400-MAJOR categorization.
    	(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
    	(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
    	* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
    	combinations.
    
    opcodes/
    	* frv-desc.c, frv-opc.c: Regenerate.
    
    sim/frv/
    	* cache.c (frv_cache_init): Change fr400 cache statistics to match
    	the fr405.
    	(non_cache_access): Add missing breaks.
    	* interrupts.c (set_exception_status_registers): Always set EAR15
    	for data_access_errors.
    	* memory.c (fr400_check_write_address): Remove redundant alignment
    	check.
    	* model.c: Regenerate.
    c7a48b9a
    History
    cpu/
    Richard Sandiford authored
    	* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
    	(scutss): Change unit to I0.
    	(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
    	(mqsaths): Fix FR400-MAJOR categorization.
    	(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
    	(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
    	* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
    	combinations.
    
    opcodes/
    	* frv-desc.c, frv-opc.c: Regenerate.
    
    sim/frv/
    	* cache.c (frv_cache_init): Change fr400 cache statistics to match
    	the fr405.
    	(non_cache_access): Add missing breaks.
    	* interrupts.c (set_exception_status_registers): Always set EAR15
    	for data_access_errors.
    	* memory.c (fr400_check_write_address): Remove redundant alignment
    	check.
    	* model.c: Regenerate.