diff --git a/test/unison/Makefile b/test/unison/Makefile index 89f5926a4a28d9c59ba2ad2a04e7f1f3573591cd..7ff7119c13c7fe8bf7df40278ed75b716c6ba270 100644 --- a/test/unison/Makefile +++ b/test/unison/Makefile @@ -1,7 +1,7 @@ -# Time-stamp: <modified the 07/03/2019 (at 16:38) by Erwan> +# Time-stamp: <modified the 07/03/2019 (at 16:47) by Erwan> test: unison.cmxs - $(sasa) -l 200 fig4.1.dot + $(sasa) -l 5 fig4.1.dot -sd test2: unison.cmxs $(sasa) -l 200 ring.dot diff --git a/test/unison/fig4.1.dot b/test/unison/fig4.1.dot index c92dd939a303b3e503c5193b898dcdddc158b7af..2f93634d85ab0c1c098fa0a21903c5cdd96fabc5 100644 --- a/test/unison/fig4.1.dot +++ b/test/unison/fig4.1.dot @@ -1,16 +1,16 @@ graph fig4_1 { - p1 [algo="unison.cmxs"] - p2 [algo="unison.cmxs" ] - p3 [algo="unison.cmxs"] - p4 [algo="unison.cmxs"] - p5 [algo="unison.cmxs"] - p6 [algo="unison.cmxs"] - p7 [algo="unison.cmxs"] - p8 [algo="unison.cmxs"] + p1 [algo="unison.cmxs" init="clock=7"] + p2 [algo="unison.cmxs" init="clock=8"] + p3 [algo="unison.cmxs" init="clock=4"] + p4 [algo="unison.cmxs" init="clock=3"] + p5 [algo="unison.cmxs" init="clock=0"] + p6 [algo="unison.cmxs" init="clock=7"] + p7 [algo="unison.cmxs" init="clock=2"] + p8 [algo="unison.cmxs" init="clock=7"] p1 -- p2 -- p3 -- p4 -- p5 -- p3 p2 -- p7 -- p6 -- p3 p7 -- p8 -- p6 - + p8 -- p5 } diff --git a/test/unison/unison.ml b/test/unison/unison.ml index d489917dbae0a4520625cdd13ad95ebd67f85f7b..a4ef3ce2561155cdd11c23e19fe83ec23de83dd6 100644 --- a/test/unison/unison.ml +++ b/test/unison/unison.ml @@ -1,9 +1,9 @@ -(* Time-stamp: <modified the 07/03/2019 (at 14:06) by Erwan> *) +(* Time-stamp: <modified the 07/03/2019 (at 16:42) by Erwan> *) open Algo let vars = ["clock",It] -let m=42 +let m=10 let init_vars = function _ -> I (Random.int m) @@ -18,7 +18,7 @@ let i e v = match e v with I i -> i | _ -> assert false let new_clock_value nl e = let cl = List.map (fun n -> i n.lenv "clock") nl in let min_clock = List.fold_left min (i e "clock") cl in - (min_clock + 1) mod m + (min_clock + 1) mod m let enable_f nl e = if I (new_clock_value nl e) <> e "clock" then ["incr"] else []