From 5d1e48a3dc61fda5123cb78ff147805dbcbe8208 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?S=C3=A9bastien=20Michelland?=
<sebastien.michelland@lcis.grenoble-inp.fr>
Date: Thu, 4 Jan 2024 00:30:05 +0100
Subject: [PATCH] update reference products
---
README.md | 2 +-
out-reference/README | 176 +++++++++---------
.../basicmath-campaign-fsh-ex-s32-1.txt | 2 +-
.../basicmath-campaign-fsh-ex-s32-2.txt | 2 +-
.../basicmath-campaign-fsh-ex-sar32.txt | 2 +-
.../basicmath-campaign-fsh-multi-random.txt | 2 +-
.../m5out/basicmath_icache_FSH/config.dot.pdf | Bin 14694 -> 14694 bytes
.../m5out/basicmath_icache_FSH/simout | 4 +-
.../m5out/basicmath_icache_FSH/stats.txt | 8 +-
.../m5out/basicmath_icache_REF/config.dot.pdf | Bin 14694 -> 14694 bytes
.../m5out/basicmath_icache_REF/simout | 4 +-
.../m5out/basicmath_icache_REF/stats.txt | 10 +-
.../basicmath_nocache_FSH/config.dot.pdf | Bin 13832 -> 13832 bytes
.../m5out/basicmath_nocache_FSH/simout | 4 +-
.../m5out/basicmath_nocache_FSH/stats.txt | 8 +-
.../basicmath_nocache_REF/config.dot.pdf | Bin 13832 -> 13832 bytes
.../m5out/basicmath_nocache_REF/simout | 4 +-
.../m5out/basicmath_nocache_REF/stats.txt | 8 +-
.../m5out/bitcount_icache_FSH/config.dot.pdf | Bin 14694 -> 14694 bytes
.../m5out/bitcount_icache_FSH/simout | 4 +-
.../m5out/bitcount_icache_FSH/stats.txt | 8 +-
.../m5out/bitcount_icache_REF/config.dot.pdf | Bin 14694 -> 14694 bytes
.../m5out/bitcount_icache_REF/simout | 4 +-
.../m5out/bitcount_icache_REF/stats.txt | 8 +-
.../m5out/bitcount_nocache_FSH/config.dot.pdf | Bin 13832 -> 13832 bytes
.../m5out/bitcount_nocache_FSH/simout | 4 +-
.../m5out/bitcount_nocache_FSH/stats.txt | 8 +-
.../m5out/bitcount_nocache_REF/config.dot.pdf | Bin 13832 -> 13832 bytes
.../m5out/bitcount_nocache_REF/simout | 4 +-
.../m5out/bitcount_nocache_REF/stats.txt | 8 +-
.../m5out/blowfish_icache_FSH/config.dot.pdf | Bin 14694 -> 14694 bytes
.../m5out/blowfish_icache_FSH/simout | 4 +-
.../m5out/blowfish_icache_FSH/stats.txt | 10 +-
.../m5out/blowfish_icache_REF/config.dot.pdf | Bin 14694 -> 14694 bytes
.../m5out/blowfish_icache_REF/simout | 4 +-
.../m5out/blowfish_icache_REF/stats.txt | 10 +-
.../m5out/blowfish_nocache_FSH/config.dot.pdf | Bin 13832 -> 13832 bytes
.../m5out/blowfish_nocache_FSH/simout | 4 +-
.../m5out/blowfish_nocache_FSH/stats.txt | 10 +-
.../m5out/blowfish_nocache_REF/config.dot.pdf | Bin 13832 -> 13832 bytes
.../m5out/blowfish_nocache_REF/simout | 4 +-
.../m5out/blowfish_nocache_REF/stats.txt | 10 +-
.../m5out/dijkstra_icache_FSH/config.dot.pdf | Bin 14694 -> 14694 bytes
.../m5out/dijkstra_icache_FSH/simout | 4 +-
.../m5out/dijkstra_icache_FSH/stats.txt | 8 +-
.../m5out/dijkstra_icache_REF/config.dot.pdf | Bin 14694 -> 14694 bytes
.../m5out/dijkstra_icache_REF/simout | 4 +-
.../m5out/dijkstra_icache_REF/stats.txt | 8 +-
.../m5out/dijkstra_nocache_FSH/config.dot.pdf | Bin 13832 -> 13832 bytes
.../m5out/dijkstra_nocache_FSH/simout | 4 +-
.../m5out/dijkstra_nocache_FSH/stats.txt | 8 +-
.../m5out/dijkstra_nocache_REF/config.dot.pdf | Bin 13832 -> 13832 bytes
.../m5out/dijkstra_nocache_REF/simout | 4 +-
.../m5out/dijkstra_nocache_REF/stats.txt | 10 +-
.../m5out/patricia_icache_FSH/simout | 4 +-
.../m5out/patricia_icache_REF/simout | 4 +-
.../m5out/patricia_nocache_FSH/simout | 4 +-
.../m5out/patricia_nocache_REF/simout | 4 +-
.../m5out/qsort_icache_FSH/config.dot.pdf | Bin 14694 -> 14694 bytes
out-reference/m5out/qsort_icache_FSH/simout | 4 +-
.../m5out/qsort_icache_FSH/stats.txt | 8 +-
.../m5out/qsort_icache_REF/config.dot.pdf | Bin 14694 -> 14694 bytes
out-reference/m5out/qsort_icache_REF/simout | 4 +-
.../m5out/qsort_icache_REF/stats.txt | 8 +-
.../m5out/qsort_nocache_FSH/config.dot.pdf | Bin 13832 -> 13832 bytes
out-reference/m5out/qsort_nocache_FSH/simout | 4 +-
.../m5out/qsort_nocache_FSH/stats.txt | 8 +-
.../m5out/qsort_nocache_REF/config.dot.pdf | Bin 13832 -> 13832 bytes
out-reference/m5out/qsort_nocache_REF/simout | 4 +-
.../m5out/qsort_nocache_REF/stats.txt | 8 +-
.../m5out/rijndael_icache_FSH/config.dot.pdf | Bin 14694 -> 14694 bytes
.../m5out/rijndael_icache_FSH/simout | 4 +-
.../m5out/rijndael_icache_FSH/stats.txt | 8 +-
.../m5out/rijndael_icache_REF/config.dot.pdf | Bin 14694 -> 14694 bytes
.../m5out/rijndael_icache_REF/simout | 4 +-
.../m5out/rijndael_icache_REF/stats.txt | 8 +-
.../m5out/rijndael_nocache_FSH/config.dot.pdf | Bin 13832 -> 13832 bytes
.../m5out/rijndael_nocache_FSH/simout | 4 +-
.../m5out/rijndael_nocache_FSH/stats.txt | 8 +-
.../m5out/rijndael_nocache_REF/config.dot.pdf | Bin 13832 -> 13832 bytes
.../m5out/rijndael_nocache_REF/simout | 4 +-
.../m5out/rijndael_nocache_REF/stats.txt | 8 +-
.../m5out/sha_icache_FSH/config.dot.pdf | Bin 14694 -> 14694 bytes
out-reference/m5out/sha_icache_FSH/simout | 4 +-
out-reference/m5out/sha_icache_FSH/stats.txt | 8 +-
.../m5out/sha_icache_REF/config.dot.pdf | Bin 14694 -> 14694 bytes
out-reference/m5out/sha_icache_REF/simout | 4 +-
out-reference/m5out/sha_icache_REF/stats.txt | 8 +-
.../m5out/sha_nocache_FSH/config.dot.pdf | Bin 13832 -> 13832 bytes
out-reference/m5out/sha_nocache_FSH/simout | 4 +-
out-reference/m5out/sha_nocache_FSH/stats.txt | 8 +-
.../m5out/sha_nocache_REF/config.dot.pdf | Bin 13832 -> 13832 bytes
out-reference/m5out/sha_nocache_REF/simout | 4 +-
out-reference/m5out/sha_nocache_REF/stats.txt | 8 +-
.../m5out/susan_icache_FSH/config.dot.pdf | Bin 14694 -> 14694 bytes
out-reference/m5out/susan_icache_FSH/simout | 4 +-
.../m5out/susan_icache_FSH/stats.txt | 10 +-
.../m5out/susan_icache_REF/config.dot.pdf | Bin 14694 -> 14694 bytes
out-reference/m5out/susan_icache_REF/simout | 4 +-
.../m5out/susan_icache_REF/stats.txt | 10 +-
.../m5out/susan_nocache_FSH/config.dot.pdf | Bin 13832 -> 13832 bytes
out-reference/m5out/susan_nocache_FSH/simout | 4 +-
.../m5out/susan_nocache_FSH/stats.txt | 8 +-
.../m5out/susan_nocache_REF/config.dot.pdf | Bin 13832 -> 13832 bytes
out-reference/m5out/susan_nocache_REF/simout | 4 +-
.../m5out/susan_nocache_REF/stats.txt | 8 +-
106 files changed, 304 insertions(+), 298 deletions(-)
diff --git a/README.md b/README.md
index c118cce..d79cd11 100644
--- a/README.md
+++ b/README.md
@@ -25,7 +25,7 @@ To get straight to reproduced results on an x86\_64 machine, no questions asked,
TODO: Link to Zenodo.
-```
+```bash
% xz -d --stdout cc24-fetch-skips-hardening.tar.xz | sudo docker load
% sudo docker run -it localhost/cc24-fetch-skips-hardening
root@(container):~# make all_REF all_FSH run_REF run_FSH
diff --git a/out-reference/README b/out-reference/README
index 2591b79..533683e 100644
--- a/out-reference/README
+++ b/out-reference/README
@@ -3,19 +3,25 @@ GENERATED FILES - DO NOT EDIT!
------------------------------
These are fetch skips hardening test results.
-Generated by None@05643258e4d3 on 2024-01-02 22:33:33.642255.
+Generated by None@e6a95357fd5c on 2024-01-03 23:27:27.173807.
campaigns/*.txt -- generated by fault.py:
Raw results of fault injection campaigns (might be partial), and information
about PCs not reached by test executions (*-notreached.txt).
+m5out/* -- generated by gem5script.py running in Gem5:
+ Raw results of performance simulations in Gem5.
campaigns.csv -- generated by summary.py:
- Summary of all above results of campaigns in CSV format.
-
+ Summary/statistics of above campaigns in CSV format.
+perf.csv -- generated by summary.py:
+ Execution time statistics extracted from m5out/ traces, in CSV format.
size.csv -- generated by summary.py:
Variation in program size between reference and hardened version.
-TODO: Performance simulations.
+campaigns.png -- generated by plot_campaigns.py:
+ Plot of campaigns.csv.
+perf.png -- generated by plot_performance.py:
+ Plot of size.csv and perf.csv.
Tool versions:
- llvm-property-preserving: (could not obtain commit)
@@ -24,84 +30,84 @@ Tool versions:
- gem5: (could not obtain commit)
Input files:
-- mibench/automotive/basicmath/basicmath_small_REF: 2024-01-02 21:09:03.300356
-- mibench/automotive/basicmath/basicmath_small_FSH: 2024-01-02 21:09:05.464356
-- mibench/automotive/bitcount/bitcnts_REF: 2024-01-02 21:09:03.640356
-- mibench/automotive/bitcount/bitcnts_FSH: 2024-01-02 21:09:05.808356
-- mibench/automotive/qsort/qsort_small_REF: 2024-01-02 21:09:03.688356
-- mibench/automotive/qsort/qsort_small_FSH: 2024-01-02 21:09:05.856356
-- mibench/automotive/susan/susan_REF: 2024-01-02 21:09:04.068356
-- mibench/automotive/susan/susan_FSH: 2024-01-02 21:09:06.240356
-- mibench/network/dijkstra/dijkstra_small_REF: 2024-01-02 21:09:04.124356
-- mibench/network/dijkstra/dijkstra_small_FSH: 2024-01-02 21:09:06.296356
-- mibench/network/patricia/patricia_REF: 2024-01-02 21:09:04.268356
-- mibench/network/patricia/patricia_FSH: 2024-01-02 21:09:06.440356
-- mibench/security/blowfish/bf_REF: 2024-01-02 21:09:04.464356
-- mibench/security/blowfish/bf_FSH: 2024-01-02 21:09:06.636356
-- mibench/security/rijndael/rijndael_REF: 2024-01-02 21:09:05.252356
-- mibench/security/rijndael/rijndael_FSH: 2024-01-02 21:09:07.364356
-- mibench/security/sha/sha_REF: 2024-01-02 21:09:05.344356
-- mibench/security/sha/sha_FSH: 2024-01-02 21:09:07.452356
-- out/campaigns/basicmath-campaign-fsh-ex-s32-1.txt: 2024-01-02 21:17:56.696373
-- out/campaigns/basicmath-campaign-fsh-ex-s32-2.txt: 2024-01-02 21:20:06.108377
-- out/campaigns/basicmath-campaign-fsh-ex-sar32.txt: 2024-01-02 21:21:10.176378
-- out/campaigns/basicmath-campaign-fsh-multi-random.txt: 2024-01-02 21:24:46.452385
-- out/campaigns/basicmath-campaign-ref-ex-s32-1.txt: 2024-01-02 21:39:01.580411
-- out/campaigns/basicmath-campaign-ref-ex-s32-2.txt: 2024-01-02 21:40:29.472414
-- out/campaigns/basicmath-campaign-ref-ex-sar32.txt: 2024-01-02 21:41:02.896415
-- out/campaigns/bitcount-campaign-fsh-ex-s32-1.txt: 2024-01-02 21:14:41.404366
-- out/campaigns/bitcount-campaign-fsh-ex-s32-2.txt: 2024-01-02 21:19:41.900376
-- out/campaigns/bitcount-campaign-fsh-ex-sar32.txt: 2024-01-02 21:20:45.968378
-- out/campaigns/bitcount-campaign-fsh-multi-random.txt: 2024-01-02 21:27:04.672389
-- out/campaigns/bitcount-campaign-ref-ex-s32-1.txt: 2024-01-02 21:38:23.488410
-- out/campaigns/bitcount-campaign-ref-ex-s32-2.txt: 2024-01-02 21:40:04.196413
-- out/campaigns/bitcount-campaign-ref-ex-sar32.txt: 2024-01-02 21:40:37.532414
-- out/campaigns/qsort-campaign-fsh-ex-s32-1.txt: 2024-01-02 21:10:43.120359
-- out/campaigns/qsort-campaign-fsh-ex-s32-2.txt: 2024-01-02 21:19:05.228374
-- out/campaigns/qsort-campaign-fsh-ex-sar32.txt: 2024-01-02 21:20:08.172376
-- out/campaigns/qsort-campaign-fsh-multi-random.txt: 2024-01-02 21:22:25.740381
-- out/campaigns/qsort-campaign-ref-ex-s32-1.txt: 2024-01-02 21:38:05.344409
-- out/campaigns/qsort-campaign-ref-ex-s32-2.txt: 2024-01-02 21:39:57.496413
-- out/campaigns/qsort-campaign-ref-ex-sar32.txt: 2024-01-02 21:40:30.636414
-- out/campaigns/susan-campaign-fsh-ex-s32-1.txt: 2024-01-02 21:18:33.320374
-- out/campaigns/susan-campaign-fsh-ex-s32-2.txt: 2024-01-02 21:19:16.344375
-- out/campaigns/susan-campaign-fsh-ex-sar32.txt: 2024-01-02 21:20:20.252377
-- out/campaigns/susan-campaign-fsh-multi-random.txt: 2024-01-02 21:25:43.404387
-- out/campaigns/susan-campaign-ref-ex-s32-1.txt: 2024-01-02 21:39:25.040412
-- out/campaigns/susan-campaign-ref-ex-s32-2.txt: 2024-01-02 21:40:01.320413
-- out/campaigns/susan-campaign-ref-ex-sar32.txt: 2024-01-02 21:40:34.504414
-- out/campaigns/dijkstra-campaign-fsh-ex-s32-1.txt: 2024-01-02 21:12:15.124362
-- out/campaigns/dijkstra-campaign-fsh-ex-s32-2.txt: 2024-01-02 21:19:18.236375
-- out/campaigns/dijkstra-campaign-fsh-ex-sar32.txt: 2024-01-02 21:20:22.380377
-- out/campaigns/dijkstra-campaign-fsh-multi-random.txt: 2024-01-02 21:25:07.400386
-- out/campaigns/dijkstra-campaign-ref-ex-s32-1.txt: 2024-01-02 21:38:11.264410
-- out/campaigns/dijkstra-campaign-ref-ex-s32-2.txt: 2024-01-02 21:40:00.364413
-- out/campaigns/dijkstra-campaign-ref-ex-sar32.txt: 2024-01-02 21:40:33.436414
-- out/campaigns/patricia-campaign-fsh-ex-s32-1.txt: 2024-01-02 21:19:03.196374
-- out/campaigns/patricia-campaign-fsh-ex-s32-2.txt: 2024-01-02 21:19:13.088375
-- out/campaigns/patricia-campaign-fsh-ex-sar32.txt: 2024-01-02 21:20:17.248377
-- out/campaigns/patricia-campaign-fsh-multi-random.txt: 2024-01-02 21:38:03.816409
-- out/campaigns/patricia-campaign-ref-ex-s32-1.txt: 2024-01-02 21:39:56.416413
-- out/campaigns/patricia-campaign-ref-ex-s32-2.txt: 2024-01-02 21:40:01.260413
-- out/campaigns/patricia-campaign-ref-ex-sar32.txt: 2024-01-02 21:40:34.404414
-- out/campaigns/blowfish-campaign-fsh-ex-s32-1.txt: 2024-01-02 21:14:35.072366
-- out/campaigns/blowfish-campaign-fsh-ex-s32-2.txt: 2024-01-02 21:19:10.804375
-- out/campaigns/blowfish-campaign-fsh-ex-sar32.txt: 2024-01-02 21:20:14.296377
-- out/campaigns/blowfish-campaign-fsh-multi-random.txt: 2024-01-02 21:26:35.776388
-- out/campaigns/blowfish-campaign-ref-ex-s32-1.txt: 2024-01-02 21:38:49.504411
-- out/campaigns/blowfish-campaign-ref-ex-s32-2.txt: 2024-01-02 21:40:00.760413
-- out/campaigns/blowfish-campaign-ref-ex-sar32.txt: 2024-01-02 21:40:33.824414
-- out/campaigns/rijndael-campaign-fsh-ex-s32-1.txt: 2024-01-02 21:16:04.484369
-- out/campaigns/rijndael-campaign-fsh-ex-s32-2.txt: 2024-01-02 21:19:31.680375
-- out/campaigns/rijndael-campaign-fsh-ex-sar32.txt: 2024-01-02 21:20:35.708377
-- out/campaigns/rijndael-campaign-fsh-multi-random.txt: 2024-01-02 21:26:11.644387
-- out/campaigns/rijndael-campaign-ref-ex-s32-1.txt: 2024-01-02 21:39:11.048411
-- out/campaigns/rijndael-campaign-ref-ex-s32-2.txt: 2024-01-02 21:40:17.012413
-- out/campaigns/rijndael-campaign-ref-ex-sar32.txt: 2024-01-02 21:40:47.432414
-- out/campaigns/sha-campaign-fsh-ex-s32-1.txt: 2024-01-02 21:11:03.552360
-- out/campaigns/sha-campaign-fsh-ex-s32-2.txt: 2024-01-02 21:19:09.988375
-- out/campaigns/sha-campaign-fsh-ex-sar32.txt: 2024-01-02 21:20:13.112377
-- out/campaigns/sha-campaign-fsh-multi-random.txt: 2024-01-02 21:22:42.484381
-- out/campaigns/sha-campaign-ref-ex-s32-1.txt: 2024-01-02 21:38:08.960409
-- out/campaigns/sha-campaign-ref-ex-s32-2.txt: 2024-01-02 21:39:59.596413
-- out/campaigns/sha-campaign-ref-ex-sar32.txt: 2024-01-02 21:40:32.744414
+- mibench/automotive/basicmath/basicmath_small_REF: 2024-01-03 22:38:33.961340
+- mibench/automotive/basicmath/basicmath_small_FSH: 2024-01-03 22:38:36.089340
+- mibench/automotive/bitcount/bitcnts_REF: 2024-01-03 22:38:34.309340
+- mibench/automotive/bitcount/bitcnts_FSH: 2024-01-03 22:38:36.433341
+- mibench/automotive/qsort/qsort_small_REF: 2024-01-03 22:38:34.357341
+- mibench/automotive/qsort/qsort_small_FSH: 2024-01-03 22:38:36.485341
+- mibench/automotive/susan/susan_REF: 2024-01-03 22:38:34.741340
+- mibench/automotive/susan/susan_FSH: 2024-01-03 22:38:36.869341
+- mibench/network/dijkstra/dijkstra_small_REF: 2024-01-03 22:38:34.805341
+- mibench/network/dijkstra/dijkstra_small_FSH: 2024-01-03 22:38:36.933341
+- mibench/network/patricia/patricia_REF: 2024-01-03 22:38:34.949341
+- mibench/network/patricia/patricia_FSH: 2024-01-03 22:38:37.077341
+- mibench/security/blowfish/bf_REF: 2024-01-03 22:38:35.153341
+- mibench/security/blowfish/bf_FSH: 2024-01-03 22:38:37.281341
+- mibench/security/rijndael/rijndael_REF: 2024-01-03 22:38:35.873341
+- mibench/security/rijndael/rijndael_FSH: 2024-01-03 22:38:38.001341
+- mibench/security/sha/sha_REF: 2024-01-03 22:38:35.965341
+- mibench/security/sha/sha_FSH: 2024-01-03 22:38:38.093341
+- out/campaigns/basicmath-campaign-fsh-ex-s32-1.txt: 2024-01-03 22:47:23.881357
+- out/campaigns/basicmath-campaign-fsh-ex-s32-2.txt: 2024-01-03 22:49:31.597361
+- out/campaigns/basicmath-campaign-fsh-ex-sar32.txt: 2024-01-03 22:50:34.637362
+- out/campaigns/basicmath-campaign-fsh-multi-random.txt: 2024-01-03 22:54:06.573369
+- out/campaigns/basicmath-campaign-ref-ex-s32-1.txt: 2024-01-03 23:08:12.169395
+- out/campaigns/basicmath-campaign-ref-ex-s32-2.txt: 2024-01-03 23:09:39.429397
+- out/campaigns/basicmath-campaign-ref-ex-sar32.txt: 2024-01-03 23:10:12.509398
+- out/campaigns/bitcount-campaign-fsh-ex-s32-1.txt: 2024-01-03 22:44:10.473351
+- out/campaigns/bitcount-campaign-fsh-ex-s32-2.txt: 2024-01-03 22:49:07.441360
+- out/campaigns/bitcount-campaign-fsh-ex-sar32.txt: 2024-01-03 22:50:10.613362
+- out/campaigns/bitcount-campaign-fsh-multi-random.txt: 2024-01-03 22:56:23.925373
+- out/campaigns/bitcount-campaign-ref-ex-s32-1.txt: 2024-01-03 23:07:35.133394
+- out/campaigns/bitcount-campaign-ref-ex-s32-2.txt: 2024-01-03 23:09:14.101397
+- out/campaigns/bitcount-campaign-ref-ex-sar32.txt: 2024-01-03 23:09:47.441398
+- out/campaigns/qsort-campaign-fsh-ex-s32-1.txt: 2024-01-03 22:40:16.585344
+- out/campaigns/qsort-campaign-fsh-ex-s32-2.txt: 2024-01-03 22:48:31.485359
+- out/campaigns/qsort-campaign-fsh-ex-sar32.txt: 2024-01-03 22:49:33.629361
+- out/campaigns/qsort-campaign-fsh-multi-random.txt: 2024-01-03 22:51:48.625365
+- out/campaigns/qsort-campaign-ref-ex-s32-1.txt: 2024-01-03 23:07:17.681393
+- out/campaigns/qsort-campaign-ref-ex-s32-2.txt: 2024-01-03 23:09:07.673396
+- out/campaigns/qsort-campaign-ref-ex-sar32.txt: 2024-01-03 23:09:40.521397
+- out/campaigns/susan-campaign-fsh-ex-s32-1.txt: 2024-01-03 22:47:58.233358
+- out/campaigns/susan-campaign-fsh-ex-s32-2.txt: 2024-01-03 22:48:42.085359
+- out/campaigns/susan-campaign-fsh-ex-sar32.txt: 2024-01-03 22:49:45.281361
+- out/campaigns/susan-campaign-fsh-multi-random.txt: 2024-01-03 22:55:03.105371
+- out/campaigns/susan-campaign-ref-ex-s32-1.txt: 2024-01-03 23:08:34.609396
+- out/campaigns/susan-campaign-ref-ex-s32-2.txt: 2024-01-03 23:09:11.413397
+- out/campaigns/susan-campaign-ref-ex-sar32.txt: 2024-01-03 23:09:44.385397
+- out/campaigns/dijkstra-campaign-fsh-ex-s32-1.txt: 2024-01-03 22:41:48.097346
+- out/campaigns/dijkstra-campaign-fsh-ex-s32-2.txt: 2024-01-03 22:48:43.941359
+- out/campaigns/dijkstra-campaign-fsh-ex-sar32.txt: 2024-01-03 22:49:47.145361
+- out/campaigns/dijkstra-campaign-fsh-multi-random.txt: 2024-01-03 22:54:26.705369
+- out/campaigns/dijkstra-campaign-ref-ex-s32-1.txt: 2024-01-03 23:07:23.345393
+- out/campaigns/dijkstra-campaign-ref-ex-s32-2.txt: 2024-01-03 23:09:10.345397
+- out/campaigns/dijkstra-campaign-ref-ex-sar32.txt: 2024-01-03 23:09:43.313397
+- out/campaigns/patricia-campaign-fsh-ex-s32-1.txt: 2024-01-03 22:48:29.449359
+- out/campaigns/patricia-campaign-fsh-ex-s32-2.txt: 2024-01-03 22:48:39.137359
+- out/campaigns/patricia-campaign-fsh-ex-sar32.txt: 2024-01-03 22:49:41.985361
+- out/campaigns/patricia-campaign-fsh-multi-random.txt: 2024-01-03 23:07:16.273393
+- out/campaigns/patricia-campaign-ref-ex-s32-1.txt: 2024-01-03 23:09:06.557396
+- out/campaigns/patricia-campaign-ref-ex-s32-2.txt: 2024-01-03 23:09:11.321397
+- out/campaigns/patricia-campaign-ref-ex-sar32.txt: 2024-01-03 23:09:44.305398
+- out/campaigns/blowfish-campaign-fsh-ex-s32-1.txt: 2024-01-03 22:44:06.413351
+- out/campaigns/blowfish-campaign-fsh-ex-s32-2.txt: 2024-01-03 22:48:37.025359
+- out/campaigns/blowfish-campaign-fsh-ex-sar32.txt: 2024-01-03 22:49:39.245361
+- out/campaigns/blowfish-campaign-fsh-multi-random.txt: 2024-01-03 22:55:54.669372
+- out/campaigns/blowfish-campaign-ref-ex-s32-1.txt: 2024-01-03 23:08:00.041394
+- out/campaigns/blowfish-campaign-ref-ex-s32-2.txt: 2024-01-03 23:09:10.889396
+- out/campaigns/blowfish-campaign-ref-ex-sar32.txt: 2024-01-03 23:09:43.709398
+- out/campaigns/rijndael-campaign-fsh-ex-s32-1.txt: 2024-01-03 22:45:32.873353
+- out/campaigns/rijndael-campaign-fsh-ex-s32-2.txt: 2024-01-03 22:48:57.313359
+- out/campaigns/rijndael-campaign-fsh-ex-sar32.txt: 2024-01-03 22:50:00.345361
+- out/campaigns/rijndael-campaign-fsh-multi-random.txt: 2024-01-03 22:55:31.309371
+- out/campaigns/rijndael-campaign-ref-ex-s32-1.txt: 2024-01-03 23:08:20.705395
+- out/campaigns/rijndael-campaign-ref-ex-s32-2.txt: 2024-01-03 23:09:26.821397
+- out/campaigns/rijndael-campaign-ref-ex-sar32.txt: 2024-01-03 23:09:57.045398
+- out/campaigns/sha-campaign-fsh-ex-s32-1.txt: 2024-01-03 22:40:37.257344
+- out/campaigns/sha-campaign-fsh-ex-s32-2.txt: 2024-01-03 22:48:36.057359
+- out/campaigns/sha-campaign-fsh-ex-sar32.txt: 2024-01-03 22:49:38.285361
+- out/campaigns/sha-campaign-fsh-multi-random.txt: 2024-01-03 22:52:06.257365
+- out/campaigns/sha-campaign-ref-ex-s32-1.txt: 2024-01-03 23:07:20.945393
+- out/campaigns/sha-campaign-ref-ex-s32-2.txt: 2024-01-03 23:09:09.673397
+- out/campaigns/sha-campaign-ref-ex-sar32.txt: 2024-01-03 23:09:42.633398
diff --git a/out-reference/campaigns/basicmath-campaign-fsh-ex-s32-1.txt b/out-reference/campaigns/basicmath-campaign-fsh-ex-s32-1.txt
index 8895f4d..35fb351 100644
--- a/out-reference/campaigns/basicmath-campaign-fsh-ex-s32-1.txt
+++ b/out-reference/campaigns/basicmath-campaign-fsh-ex-s32-1.txt
@@ -4,6 +4,6 @@ fsh-ex-s32-1,0,1543,0,833,0,115,60,3,1
# OTHER for (266136, 's32,1'):
# summary of faults to be injected:
# 00040f98: s32 (k=1)
-# /root/riscv_qemu_FSH: line 5: 51504 Bus error "${ROOT}"/prefix/bin/qemu-riscv32 -cpu rv32-fsh "$@"
+# /root/riscv_qemu_FSH: line 5: 51497 Bus error "${ROOT}"/prefix/bin/qemu-riscv32 -cpu rv32-fsh "$@"
diff --git a/out-reference/campaigns/basicmath-campaign-fsh-ex-s32-2.txt b/out-reference/campaigns/basicmath-campaign-fsh-ex-s32-2.txt
index 7a0c213..a3f14c6 100644
--- a/out-reference/campaigns/basicmath-campaign-fsh-ex-s32-2.txt
+++ b/out-reference/campaigns/basicmath-campaign-fsh-ex-s32-2.txt
@@ -4,6 +4,6 @@ fsh-ex-s32-2,0,1541,0,833,0,114,63,3,1
# OTHER for (266132, 's32,2'):
# summary of faults to be injected:
# 00040f94: s32 (k=2)
-# /root/riscv_qemu_FSH: line 5: 114597 Bus error "${ROOT}"/prefix/bin/qemu-riscv32 -cpu rv32-fsh "$@"
+# /root/riscv_qemu_FSH: line 5: 114535 Bus error "${ROOT}"/prefix/bin/qemu-riscv32 -cpu rv32-fsh "$@"
diff --git a/out-reference/campaigns/basicmath-campaign-fsh-ex-sar32.txt b/out-reference/campaigns/basicmath-campaign-fsh-ex-sar32.txt
index 500ba6e..64afaf6 100644
--- a/out-reference/campaigns/basicmath-campaign-fsh-ex-sar32.txt
+++ b/out-reference/campaigns/basicmath-campaign-fsh-ex-sar32.txt
@@ -4,6 +4,6 @@ fsh-ex-sar32,0,1324,0,833,0,338,56,3,1
# OTHER for (266136, 's&r32'):
# summary of faults to be injected:
# 00040f98: s&r32
-# /root/riscv_qemu_FSH: line 5: 143370 Bus error "${ROOT}"/prefix/bin/qemu-riscv32 -cpu rv32-fsh "$@"
+# /root/riscv_qemu_FSH: line 5: 143284 Bus error "${ROOT}"/prefix/bin/qemu-riscv32 -cpu rv32-fsh "$@"
diff --git a/out-reference/campaigns/basicmath-campaign-fsh-multi-random.txt b/out-reference/campaigns/basicmath-campaign-fsh-multi-random.txt
index eba207b..4e8d845 100644
--- a/out-reference/campaigns/basicmath-campaign-fsh-multi-random.txt
+++ b/out-reference/campaigns/basicmath-campaign-fsh-multi-random.txt
@@ -5,6 +5,6 @@ fsh-multi-random,0,1502,0,123,0,258,99,17,1
# summary of faults to be injected:
# 00040f98: s32 (k=1)
# 00040fb4: s&r32
-# /root/riscv_qemu_FSH: line 5: 178023 Bus error "${ROOT}"/prefix/bin/qemu-riscv32 -cpu rv32-fsh "$@"
+# /root/riscv_qemu_FSH: line 5: 177881 Bus error "${ROOT}"/prefix/bin/qemu-riscv32 -cpu rv32-fsh "$@"
diff --git a/out-reference/m5out/basicmath_icache_FSH/config.dot.pdf b/out-reference/m5out/basicmath_icache_FSH/config.dot.pdf
index 3b49338ab7fafb4f7e8803d37ce17f5b75246a04..63310509cbd88e740b02789cfa2a70c54621dd18 100644
GIT binary patch
delta 19
bcmaD>^sH#ZI&(H-BV$7Yqs?2)H!%VLSi=X%
delta 19
bcmaD>^sH#ZI&(H7BSRBo<IP*lH!%VLSlI{6
diff --git a/out-reference/m5out/basicmath_icache_FSH/simout b/out-reference/m5out/basicmath_icache_FSH/simout
index f08c3af..d2a0fae 100755
--- a/out-reference/m5out/basicmath_icache_FSH/simout
+++ b/out-reference/m5out/basicmath_icache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339068
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 338999
command line: ./prefix/bin/gem5.opt -r -d out/m5out/basicmath_icache_FSH ./gem5script.py out/m5out/basicmath_icache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/basicmath_icache_FSH/stats.txt b/out-reference/m5out/basicmath_icache_FSH/stats.txt
index 6e3c8e1..0547992 100644
--- a/out-reference/m5out/basicmath_icache_FSH/stats.txt
+++ b/out-reference/m5out/basicmath_icache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.872056 # Nu
simTicks 872056017000 # Number of ticks simulated (Tick)
finalTick 872056017000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 301.68 # Real time elapsed on the host (Second)
-hostTickRate 2890631147 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 300.76 # Real time elapsed on the host (Second)
+hostTickRate 2899461804 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 632156 # Number of bytes of host memory used (Byte)
simInsts 264503608 # Number of instructions simulated (Count)
simOps 264503608 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 876758 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 876758 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 879437 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 879437 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 872056017 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/basicmath_icache_REF/config.dot.pdf b/out-reference/m5out/basicmath_icache_REF/config.dot.pdf
index 3b49338ab7fafb4f7e8803d37ce17f5b75246a04..63310509cbd88e740b02789cfa2a70c54621dd18 100644
GIT binary patch
delta 19
bcmaD>^sH#ZI&(H-BV$7Yqs?2)H!%VLSi=X%
delta 19
bcmaD>^sH#ZI&(H7BSRBo<IP*lH!%VLSlI{6
diff --git a/out-reference/m5out/basicmath_icache_REF/simout b/out-reference/m5out/basicmath_icache_REF/simout
index cbfaae9..8c7a6e5 100755
--- a/out-reference/m5out/basicmath_icache_REF/simout
+++ b/out-reference/m5out/basicmath_icache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339064
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 338997
command line: ./prefix/bin/gem5.opt -r -d out/m5out/basicmath_icache_REF ./gem5script.py out/m5out/basicmath_icache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/basicmath_icache_REF/stats.txt b/out-reference/m5out/basicmath_icache_REF/stats.txt
index 30a0248..cb9c5d6 100644
--- a/out-reference/m5out/basicmath_icache_REF/stats.txt
+++ b/out-reference/m5out/basicmath_icache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.869029 # Nu
simTicks 869029273000 # Number of ticks simulated (Tick)
finalTick 869029273000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 299.63 # Real time elapsed on the host (Second)
-hostTickRate 2900317486 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
-hostMemory 632144 # Number of bytes of host memory used (Byte)
+hostSeconds 299.43 # Real time elapsed on the host (Second)
+hostTickRate 2902326132 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostMemory 632148 # Number of bytes of host memory used (Byte)
simInsts 263874943 # Number of instructions simulated (Count)
simOps 263874943 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 880662 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 880662 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 881272 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 881272 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 869029273 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/basicmath_nocache_FSH/config.dot.pdf b/out-reference/m5out/basicmath_nocache_FSH/config.dot.pdf
index 289f02ebc5eebd6df8126b1e2333e69700555dc6..14e1e4637d1cbbfc6518372f7dbb55504e1398e9 100644
GIT binary patch
delta 19
acmeCk>B!j-V8Ui>WNc_)v^mUV6C(ga^9DWu
delta 19
acmeCk>B!j-V8Ui(WN2b+ygAHd6C(gb2?jy{
diff --git a/out-reference/m5out/basicmath_nocache_FSH/simout b/out-reference/m5out/basicmath_nocache_FSH/simout
index 5c5664a..fea438e 100755
--- a/out-reference/m5out/basicmath_nocache_FSH/simout
+++ b/out-reference/m5out/basicmath_nocache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339061
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339000
command line: ./prefix/bin/gem5.opt -r -d out/m5out/basicmath_nocache_FSH ./gem5script.py out/m5out/basicmath_nocache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/basicmath_nocache_FSH/stats.txt b/out-reference/m5out/basicmath_nocache_FSH/stats.txt
index dba96b8..933eaa9 100644
--- a/out-reference/m5out/basicmath_nocache_FSH/stats.txt
+++ b/out-reference/m5out/basicmath_nocache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 19.190150 # Nu
simTicks 19190150121000 # Number of ticks simulated (Tick)
finalTick 19190150121000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 587.65 # Real time elapsed on the host (Second)
-hostTickRate 32655540104 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 583.44 # Real time elapsed on the host (Second)
+hostTickRate 32891137599 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628852 # Number of bytes of host memory used (Byte)
simInsts 264503608 # Number of instructions simulated (Count)
simOps 264503608 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 450101 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 450101 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 453348 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 453348 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 19190150121 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/basicmath_nocache_REF/config.dot.pdf b/out-reference/m5out/basicmath_nocache_REF/config.dot.pdf
index 289f02ebc5eebd6df8126b1e2333e69700555dc6..14e1e4637d1cbbfc6518372f7dbb55504e1398e9 100644
GIT binary patch
delta 19
acmeCk>B!j-V8Ui>WNc_)v^mUV6C(ga^9DWu
delta 19
acmeCk>B!j-V8Ui(WN2b+ygAHd6C(gb2?jy{
diff --git a/out-reference/m5out/basicmath_nocache_REF/simout b/out-reference/m5out/basicmath_nocache_REF/simout
index 7fb8747..f31e6ba 100755
--- a/out-reference/m5out/basicmath_nocache_REF/simout
+++ b/out-reference/m5out/basicmath_nocache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339059
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339006
command line: ./prefix/bin/gem5.opt -r -d out/m5out/basicmath_nocache_REF ./gem5script.py out/m5out/basicmath_nocache_REF
[command line] mibench/automotive/basicmath/basicmath_small_REF []
diff --git a/out-reference/m5out/basicmath_nocache_REF/stats.txt b/out-reference/m5out/basicmath_nocache_REF/stats.txt
index 0a783e1..99bb1e7 100644
--- a/out-reference/m5out/basicmath_nocache_REF/stats.txt
+++ b/out-reference/m5out/basicmath_nocache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 19.201054 # Nu
simTicks 19201053971000 # Number of ticks simulated (Tick)
finalTick 19201053971000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 588.03 # Real time elapsed on the host (Second)
-hostTickRate 32652972391 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 582.02 # Real time elapsed on the host (Second)
+hostTickRate 32990545670 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628776 # Number of bytes of host memory used (Byte)
simInsts 263874943 # Number of instructions simulated (Count)
simOps 263874943 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 448741 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 448741 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 453380 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 453380 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 19201053971 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/bitcount_icache_FSH/config.dot.pdf b/out-reference/m5out/bitcount_icache_FSH/config.dot.pdf
index 3b49338ab7fafb4f7e8803d37ce17f5b75246a04..63310509cbd88e740b02789cfa2a70c54621dd18 100644
GIT binary patch
delta 19
bcmaD>^sH#ZI&(H-BV$7Yqs?2)H!%VLSi=X%
delta 19
bcmaD>^sH#ZI&(H7BSRBo<IP*lH!%VLSlI{6
diff --git a/out-reference/m5out/bitcount_icache_FSH/simout b/out-reference/m5out/bitcount_icache_FSH/simout
index d3cc187..9e0a982 100755
--- a/out-reference/m5out/bitcount_icache_FSH/simout
+++ b/out-reference/m5out/bitcount_icache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339090
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339018
command line: ./prefix/bin/gem5.opt -r -d out/m5out/bitcount_icache_FSH ./gem5script.py out/m5out/bitcount_icache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/bitcount_icache_FSH/stats.txt b/out-reference/m5out/bitcount_icache_FSH/stats.txt
index 7074a4b..1be62c6 100644
--- a/out-reference/m5out/bitcount_icache_FSH/stats.txt
+++ b/out-reference/m5out/bitcount_icache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.015657 # Nu
simTicks 15656981000 # Number of ticks simulated (Tick)
finalTick 15656981000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 6.29 # Real time elapsed on the host (Second)
-hostTickRate 2491016800 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 6.61 # Real time elapsed on the host (Second)
+hostTickRate 2370004155 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 631560 # Number of bytes of host memory used (Byte)
simInsts 7153953 # Number of instructions simulated (Count)
simOps 7153953 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 1138170 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 1138168 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 1082876 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 1082874 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 15656981 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/bitcount_icache_REF/config.dot.pdf b/out-reference/m5out/bitcount_icache_REF/config.dot.pdf
index 3b49338ab7fafb4f7e8803d37ce17f5b75246a04..63310509cbd88e740b02789cfa2a70c54621dd18 100644
GIT binary patch
delta 19
bcmaD>^sH#ZI&(H-BV$7Yqs?2)H!%VLSi=X%
delta 19
bcmaD>^sH#ZI&(H7BSRBo<IP*lH!%VLSlI{6
diff --git a/out-reference/m5out/bitcount_icache_REF/simout b/out-reference/m5out/bitcount_icache_REF/simout
index 11e0fb0..6b5471c 100755
--- a/out-reference/m5out/bitcount_icache_REF/simout
+++ b/out-reference/m5out/bitcount_icache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339073
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339011
command line: ./prefix/bin/gem5.opt -r -d out/m5out/bitcount_icache_REF ./gem5script.py out/m5out/bitcount_icache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/bitcount_icache_REF/stats.txt b/out-reference/m5out/bitcount_icache_REF/stats.txt
index e985c4a..4ad24c0 100644
--- a/out-reference/m5out/bitcount_icache_REF/stats.txt
+++ b/out-reference/m5out/bitcount_icache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.015046 # Nu
simTicks 15045755000 # Number of ticks simulated (Tick)
finalTick 15045755000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 5.84 # Real time elapsed on the host (Second)
-hostTickRate 2574853846 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 5.61 # Real time elapsed on the host (Second)
+hostTickRate 2683991918 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 631548 # Number of bytes of host memory used (Byte)
simInsts 5221156 # Number of instructions simulated (Count)
simOps 5221156 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 893504 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 893503 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 931374 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 931372 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 15045755 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/bitcount_nocache_FSH/config.dot.pdf b/out-reference/m5out/bitcount_nocache_FSH/config.dot.pdf
index 289f02ebc5eebd6df8126b1e2333e69700555dc6..14e1e4637d1cbbfc6518372f7dbb55504e1398e9 100644
GIT binary patch
delta 19
acmeCk>B!j-V8Ui>WNc_)v^mUV6C(ga^9DWu
delta 19
acmeCk>B!j-V8Ui(WN2b+ygAHd6C(gb2?jy{
diff --git a/out-reference/m5out/bitcount_nocache_FSH/simout b/out-reference/m5out/bitcount_nocache_FSH/simout
index d86978e..31c7b64 100755
--- a/out-reference/m5out/bitcount_nocache_FSH/simout
+++ b/out-reference/m5out/bitcount_nocache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339072
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339008
command line: ./prefix/bin/gem5.opt -r -d out/m5out/bitcount_nocache_FSH ./gem5script.py out/m5out/bitcount_nocache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/bitcount_nocache_FSH/stats.txt b/out-reference/m5out/bitcount_nocache_FSH/stats.txt
index 4c8d282..de38f2f 100644
--- a/out-reference/m5out/bitcount_nocache_FSH/stats.txt
+++ b/out-reference/m5out/bitcount_nocache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.401900 # Nu
simTicks 401900350000 # Number of ticks simulated (Tick)
finalTick 401900350000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 21.26 # Real time elapsed on the host (Second)
-hostTickRate 18905842833 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 29.23 # Real time elapsed on the host (Second)
+hostTickRate 13751806847 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628204 # Number of bytes of host memory used (Byte)
simInsts 7174193 # Number of instructions simulated (Count)
simOps 7174193 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 337480 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 337480 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 245478 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 245478 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 401900350 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/bitcount_nocache_REF/config.dot.pdf b/out-reference/m5out/bitcount_nocache_REF/config.dot.pdf
index 289f02ebc5eebd6df8126b1e2333e69700555dc6..14e1e4637d1cbbfc6518372f7dbb55504e1398e9 100644
GIT binary patch
delta 19
acmeCk>B!j-V8Ui>WNc_)v^mUV6C(ga^9DWu
delta 19
acmeCk>B!j-V8Ui(WN2b+ygAHd6C(gb2?jy{
diff --git a/out-reference/m5out/bitcount_nocache_REF/simout b/out-reference/m5out/bitcount_nocache_REF/simout
index d3b2c10..49a2ad4 100755
--- a/out-reference/m5out/bitcount_nocache_REF/simout
+++ b/out-reference/m5out/bitcount_nocache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339075
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339002
command line: ./prefix/bin/gem5.opt -r -d out/m5out/bitcount_nocache_REF ./gem5script.py out/m5out/bitcount_nocache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/bitcount_nocache_REF/stats.txt b/out-reference/m5out/bitcount_nocache_REF/stats.txt
index cc31367..0176936 100644
--- a/out-reference/m5out/bitcount_nocache_REF/stats.txt
+++ b/out-reference/m5out/bitcount_nocache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.386143 # Nu
simTicks 386142877000 # Number of ticks simulated (Tick)
finalTick 386142877000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 18.73 # Real time elapsed on the host (Second)
-hostTickRate 20621064119 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 28.06 # Real time elapsed on the host (Second)
+hostTickRate 13760190742 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628192 # Number of bytes of host memory used (Byte)
simInsts 5241253 # Number of instructions simulated (Count)
simOps 5241253 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 279895 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 279895 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 186770 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 186770 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 386142877 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/blowfish_icache_FSH/config.dot.pdf b/out-reference/m5out/blowfish_icache_FSH/config.dot.pdf
index 1b2e0d25b353969b5477e04c8787fae0fb3ae0d7..83a8384f0b5b0e74e07e880a945d5bbb961db447 100644
GIT binary patch
delta 20
ccmaD>^sH#ZI&*eoBV$7YQ`5~`%{MXv0AHL40RR91
delta 20
ccmaD>^sH#ZI&*d-BSRBoQ;W@8%{MXv0AIlf2LJ#7
diff --git a/out-reference/m5out/blowfish_icache_FSH/simout b/out-reference/m5out/blowfish_icache_FSH/simout
index 2ccbc9e..6869f5c 100755
--- a/out-reference/m5out/blowfish_icache_FSH/simout
+++ b/out-reference/m5out/blowfish_icache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:58
-gem5 executing on 05643258e4d3, pid 339412
+gem5 started Jan 3 2024 23:10:55
+gem5 executing on e6a95357fd5c, pid 339334
command line: ./prefix/bin/gem5.opt -r -d out/m5out/blowfish_icache_FSH ./gem5script.py out/m5out/blowfish_icache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/blowfish_icache_FSH/stats.txt b/out-reference/m5out/blowfish_icache_FSH/stats.txt
index ee8c732..513bece 100644
--- a/out-reference/m5out/blowfish_icache_FSH/stats.txt
+++ b/out-reference/m5out/blowfish_icache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.155705 # Nu
simTicks 155705261000 # Number of ticks simulated (Tick)
finalTick 155705261000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 88.02 # Real time elapsed on the host (Second)
-hostTickRate 1768908859 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
-hostMemory 631172 # Number of bytes of host memory used (Byte)
+hostSeconds 86.69 # Real time elapsed on the host (Second)
+hostTickRate 1796177710 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostMemory 631168 # Number of bytes of host memory used (Byte)
simInsts 53828067 # Number of instructions simulated (Count)
simOps 53828067 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 611519 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 611519 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 620946 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 620946 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 155705261 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/blowfish_icache_REF/config.dot.pdf b/out-reference/m5out/blowfish_icache_REF/config.dot.pdf
index e3c617847b763937f923a32980056cad23a65eca..83a8384f0b5b0e74e07e880a945d5bbb961db447 100644
GIT binary patch
delta 20
ccmaD>^sH#ZI&*eoBV$7YQ`5~`%{MXv0AHL40RR91
delta 20
ccmaD>^sH#ZI&*d-BSRBoQ?t!m%{MXv0AIBT1poj5
diff --git a/out-reference/m5out/blowfish_icache_REF/simout b/out-reference/m5out/blowfish_icache_REF/simout
index 985d688..f3d589f 100755
--- a/out-reference/m5out/blowfish_icache_REF/simout
+++ b/out-reference/m5out/blowfish_icache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:55
-gem5 executing on 05643258e4d3, pid 339397
+gem5 started Jan 3 2024 23:10:55
+gem5 executing on e6a95357fd5c, pid 339331
command line: ./prefix/bin/gem5.opt -r -d out/m5out/blowfish_icache_REF ./gem5script.py out/m5out/blowfish_icache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/blowfish_icache_REF/stats.txt b/out-reference/m5out/blowfish_icache_REF/stats.txt
index 9d87294..8416fa6 100644
--- a/out-reference/m5out/blowfish_icache_REF/stats.txt
+++ b/out-reference/m5out/blowfish_icache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.148827 # Nu
simTicks 148826644000 # Number of ticks simulated (Tick)
finalTick 148826644000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 83.91 # Real time elapsed on the host (Second)
-hostTickRate 1773559825 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
-hostMemory 631156 # Number of bytes of host memory used (Byte)
+hostSeconds 83.85 # Real time elapsed on the host (Second)
+hostTickRate 1774942120 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostMemory 631152 # Number of bytes of host memory used (Byte)
simInsts 47497476 # Number of instructions simulated (Count)
simOps 47497476 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 566024 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 566024 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 566465 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 566465 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 148826644 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/blowfish_nocache_FSH/config.dot.pdf b/out-reference/m5out/blowfish_nocache_FSH/config.dot.pdf
index b38f4b6b55a55a6ecd086992464f65fae34f22dc..f2076fce4624b6a724dce5f47c4b594dbdd9f7e4 100644
GIT binary patch
delta 20
bcmeCk>B!j-V8U)}WNc_)Y`i(#WFsR0Nr?t?
delta 20
bcmeCk>B!j-V8U)>WN2b+VzN2hWFsR0NvQ^S
diff --git a/out-reference/m5out/blowfish_nocache_FSH/simout b/out-reference/m5out/blowfish_nocache_FSH/simout
index 7734d05..50e6b5b 100755
--- a/out-reference/m5out/blowfish_nocache_FSH/simout
+++ b/out-reference/m5out/blowfish_nocache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:44
-gem5 executing on 05643258e4d3, pid 339370
+gem5 started Jan 3 2024 23:10:33
+gem5 executing on e6a95357fd5c, pid 339304
command line: ./prefix/bin/gem5.opt -r -d out/m5out/blowfish_nocache_FSH ./gem5script.py out/m5out/blowfish_nocache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/blowfish_nocache_FSH/stats.txt b/out-reference/m5out/blowfish_nocache_FSH/stats.txt
index 80c7eae..3c51ff8 100644
--- a/out-reference/m5out/blowfish_nocache_FSH/stats.txt
+++ b/out-reference/m5out/blowfish_nocache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 3.806869 # Nu
simTicks 3806869469000 # Number of ticks simulated (Tick)
finalTick 3806869469000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 208.43 # Real time elapsed on the host (Second)
-hostTickRate 18264795672 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
-hostMemory 627816 # Number of bytes of host memory used (Byte)
+hostSeconds 211.16 # Real time elapsed on the host (Second)
+hostTickRate 18028421110 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostMemory 627812 # Number of bytes of host memory used (Byte)
simInsts 53828067 # Number of instructions simulated (Count)
simOps 53828067 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 258259 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 258259 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 254917 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 254917 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 3806869469 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/blowfish_nocache_REF/config.dot.pdf b/out-reference/m5out/blowfish_nocache_REF/config.dot.pdf
index b38f4b6b55a55a6ecd086992464f65fae34f22dc..f2076fce4624b6a724dce5f47c4b594dbdd9f7e4 100644
GIT binary patch
delta 20
bcmeCk>B!j-V8U)}WNc_)Y`i(#WFsR0Nr?t?
delta 20
bcmeCk>B!j-V8U)>WN2b+VzN2hWFsR0NvQ^S
diff --git a/out-reference/m5out/blowfish_nocache_REF/simout b/out-reference/m5out/blowfish_nocache_REF/simout
index 1d183b9..064e3e8 100755
--- a/out-reference/m5out/blowfish_nocache_REF/simout
+++ b/out-reference/m5out/blowfish_nocache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:44
-gem5 executing on 05643258e4d3, pid 339367
+gem5 started Jan 3 2024 23:10:33
+gem5 executing on e6a95357fd5c, pid 339301
command line: ./prefix/bin/gem5.opt -r -d out/m5out/blowfish_nocache_REF ./gem5script.py out/m5out/blowfish_nocache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/blowfish_nocache_REF/stats.txt b/out-reference/m5out/blowfish_nocache_REF/stats.txt
index 02d0247..63919c7 100644
--- a/out-reference/m5out/blowfish_nocache_REF/stats.txt
+++ b/out-reference/m5out/blowfish_nocache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 3.637159 # Nu
simTicks 3637158548000 # Number of ticks simulated (Tick)
finalTick 3637158548000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 206.00 # Real time elapsed on the host (Second)
-hostTickRate 17655830992 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
-hostMemory 627796 # Number of bytes of host memory used (Byte)
+hostSeconds 201.73 # Real time elapsed on the host (Second)
+hostTickRate 18030138378 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostMemory 627792 # Number of bytes of host memory used (Byte)
simInsts 47497476 # Number of instructions simulated (Count)
simOps 47497476 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 230566 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 230566 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 235455 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 235455 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 3637158548 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/dijkstra_icache_FSH/config.dot.pdf b/out-reference/m5out/dijkstra_icache_FSH/config.dot.pdf
index 3b49338ab7fafb4f7e8803d37ce17f5b75246a04..63310509cbd88e740b02789cfa2a70c54621dd18 100644
GIT binary patch
delta 19
bcmaD>^sH#ZI&(H-BV$7Yqs?2)H!%VLSi=X%
delta 19
bcmaD>^sH#ZI&(H7BSRBo<IP*lH!%VLSlI{6
diff --git a/out-reference/m5out/dijkstra_icache_FSH/simout b/out-reference/m5out/dijkstra_icache_FSH/simout
index f72baff..2e031ee 100755
--- a/out-reference/m5out/dijkstra_icache_FSH/simout
+++ b/out-reference/m5out/dijkstra_icache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339111
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339046
command line: ./prefix/bin/gem5.opt -r -d out/m5out/dijkstra_icache_FSH ./gem5script.py out/m5out/dijkstra_icache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/dijkstra_icache_FSH/stats.txt b/out-reference/m5out/dijkstra_icache_FSH/stats.txt
index 4a512aa..ae635cc 100644
--- a/out-reference/m5out/dijkstra_icache_FSH/stats.txt
+++ b/out-reference/m5out/dijkstra_icache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.174575 # Nu
simTicks 174575185000 # Number of ticks simulated (Tick)
finalTick 174575185000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 77.32 # Real time elapsed on the host (Second)
-hostTickRate 2257845473 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 79.33 # Real time elapsed on the host (Second)
+hostTickRate 2200693149 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 631632 # Number of bytes of host memory used (Byte)
simInsts 63610890 # Number of instructions simulated (Count)
simOps 63610890 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 822701 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 822701 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 801877 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 801877 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 174575185 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/dijkstra_icache_REF/config.dot.pdf b/out-reference/m5out/dijkstra_icache_REF/config.dot.pdf
index 3b49338ab7fafb4f7e8803d37ce17f5b75246a04..63310509cbd88e740b02789cfa2a70c54621dd18 100644
GIT binary patch
delta 19
bcmaD>^sH#ZI&(H-BV$7Yqs?2)H!%VLSi=X%
delta 19
bcmaD>^sH#ZI&(H7BSRBo<IP*lH!%VLSlI{6
diff --git a/out-reference/m5out/dijkstra_icache_REF/simout b/out-reference/m5out/dijkstra_icache_REF/simout
index fa771dc..1bb94b2 100755
--- a/out-reference/m5out/dijkstra_icache_REF/simout
+++ b/out-reference/m5out/dijkstra_icache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339108
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339045
command line: ./prefix/bin/gem5.opt -r -d out/m5out/dijkstra_icache_REF ./gem5script.py out/m5out/dijkstra_icache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/dijkstra_icache_REF/stats.txt b/out-reference/m5out/dijkstra_icache_REF/stats.txt
index c3c39e4..fa38a82 100644
--- a/out-reference/m5out/dijkstra_icache_REF/stats.txt
+++ b/out-reference/m5out/dijkstra_icache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.142690 # Nu
simTicks 142689924000 # Number of ticks simulated (Tick)
finalTick 142689924000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 60.44 # Real time elapsed on the host (Second)
-hostTickRate 2360990752 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 67.24 # Real time elapsed on the host (Second)
+hostTickRate 2121982308 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 631624 # Number of bytes of host memory used (Byte)
simInsts 42848669 # Number of instructions simulated (Count)
simOps 42848669 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 708985 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 708985 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 637213 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 637213 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 142689924 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/dijkstra_nocache_FSH/config.dot.pdf b/out-reference/m5out/dijkstra_nocache_FSH/config.dot.pdf
index 289f02ebc5eebd6df8126b1e2333e69700555dc6..14e1e4637d1cbbfc6518372f7dbb55504e1398e9 100644
GIT binary patch
delta 19
acmeCk>B!j-V8Ui>WNc_)v^mUV6C(ga^9DWu
delta 19
acmeCk>B!j-V8Ui(WN2b+ygAHd6C(gb2?jy{
diff --git a/out-reference/m5out/dijkstra_nocache_FSH/simout b/out-reference/m5out/dijkstra_nocache_FSH/simout
index e05f87c..4fb14d8 100755
--- a/out-reference/m5out/dijkstra_nocache_FSH/simout
+++ b/out-reference/m5out/dijkstra_nocache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339112
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339044
command line: ./prefix/bin/gem5.opt -r -d out/m5out/dijkstra_nocache_FSH ./gem5script.py out/m5out/dijkstra_nocache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/dijkstra_nocache_FSH/stats.txt b/out-reference/m5out/dijkstra_nocache_FSH/stats.txt
index ef66ee5..887c849 100644
--- a/out-reference/m5out/dijkstra_nocache_FSH/stats.txt
+++ b/out-reference/m5out/dijkstra_nocache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 4.309692 # Nu
simTicks 4309692316000 # Number of ticks simulated (Tick)
finalTick 4309692316000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 210.26 # Real time elapsed on the host (Second)
-hostTickRate 20497224161 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 211.32 # Real time elapsed on the host (Second)
+hostTickRate 20394252130 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628120 # Number of bytes of host memory used (Byte)
simInsts 63610890 # Number of instructions simulated (Count)
simOps 63610890 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 302538 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 302538 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 301018 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 301018 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 4309692316 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/dijkstra_nocache_REF/config.dot.pdf b/out-reference/m5out/dijkstra_nocache_REF/config.dot.pdf
index 289f02ebc5eebd6df8126b1e2333e69700555dc6..14e1e4637d1cbbfc6518372f7dbb55504e1398e9 100644
GIT binary patch
delta 19
acmeCk>B!j-V8Ui>WNc_)v^mUV6C(ga^9DWu
delta 19
acmeCk>B!j-V8Ui(WN2b+ygAHd6C(gb2?jy{
diff --git a/out-reference/m5out/dijkstra_nocache_REF/simout b/out-reference/m5out/dijkstra_nocache_REF/simout
index dcca801..6272b84 100755
--- a/out-reference/m5out/dijkstra_nocache_REF/simout
+++ b/out-reference/m5out/dijkstra_nocache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339107
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339042
command line: ./prefix/bin/gem5.opt -r -d out/m5out/dijkstra_nocache_REF ./gem5script.py out/m5out/dijkstra_nocache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/dijkstra_nocache_REF/stats.txt b/out-reference/m5out/dijkstra_nocache_REF/stats.txt
index 8fbe1eb..fc271ac 100644
--- a/out-reference/m5out/dijkstra_nocache_REF/stats.txt
+++ b/out-reference/m5out/dijkstra_nocache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 3.507328 # Nu
simTicks 3507327578000 # Number of ticks simulated (Tick)
finalTick 3507327578000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 186.12 # Real time elapsed on the host (Second)
-hostTickRate 18844927938 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
-hostMemory 628116 # Number of bytes of host memory used (Byte)
+hostSeconds 198.82 # Real time elapsed on the host (Second)
+hostTickRate 17641040971 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostMemory 628112 # Number of bytes of host memory used (Byte)
simInsts 42848669 # Number of instructions simulated (Count)
simOps 42848669 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 230226 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 230226 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 215519 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 215519 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 3507327578 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/patricia_icache_FSH/simout b/out-reference/m5out/patricia_icache_FSH/simout
index e2f88d4..9f173c6 100755
--- a/out-reference/m5out/patricia_icache_FSH/simout
+++ b/out-reference/m5out/patricia_icache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:43
-gem5 executing on 05643258e4d3, pid 339364
+gem5 started Jan 3 2024 23:10:33
+gem5 executing on e6a95357fd5c, pid 339298
command line: ./prefix/bin/gem5.opt -r -d out/m5out/patricia_icache_FSH ./gem5script.py out/m5out/patricia_icache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/patricia_icache_REF/simout b/out-reference/m5out/patricia_icache_REF/simout
index ed212cc..c6f70b0 100755
--- a/out-reference/m5out/patricia_icache_REF/simout
+++ b/out-reference/m5out/patricia_icache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:43
-gem5 executing on 05643258e4d3, pid 339361
+gem5 started Jan 3 2024 23:10:33
+gem5 executing on e6a95357fd5c, pid 339295
command line: ./prefix/bin/gem5.opt -r -d out/m5out/patricia_icache_REF ./gem5script.py out/m5out/patricia_icache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/patricia_nocache_FSH/simout b/out-reference/m5out/patricia_nocache_FSH/simout
index 76f389a..48ae920 100755
--- a/out-reference/m5out/patricia_nocache_FSH/simout
+++ b/out-reference/m5out/patricia_nocache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:43
-gem5 executing on 05643258e4d3, pid 339358
+gem5 started Jan 3 2024 23:10:32
+gem5 executing on e6a95357fd5c, pid 339292
command line: ./prefix/bin/gem5.opt -r -d out/m5out/patricia_nocache_FSH ./gem5script.py out/m5out/patricia_nocache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/patricia_nocache_REF/simout b/out-reference/m5out/patricia_nocache_REF/simout
index df7b1d7..3856381 100755
--- a/out-reference/m5out/patricia_nocache_REF/simout
+++ b/out-reference/m5out/patricia_nocache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:43
-gem5 executing on 05643258e4d3, pid 339355
+gem5 started Jan 3 2024 23:10:32
+gem5 executing on e6a95357fd5c, pid 339289
command line: ./prefix/bin/gem5.opt -r -d out/m5out/patricia_nocache_REF ./gem5script.py out/m5out/patricia_nocache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/qsort_icache_FSH/config.dot.pdf b/out-reference/m5out/qsort_icache_FSH/config.dot.pdf
index ec795f686c11446f5ae48dfe27c73808a0d76ca1..63310509cbd88e740b02789cfa2a70c54621dd18 100644
GIT binary patch
delta 20
ccmaD>^sH#ZI&*eoBV$7YBeTt0%{MXv0AGy<{{R30
delta 20
ccmaD>^sH#ZI&*d-BSRBoWAn{h%{MXv0AH;L1ONa4
diff --git a/out-reference/m5out/qsort_icache_FSH/simout b/out-reference/m5out/qsort_icache_FSH/simout
index fa0baf2..e7e80a8 100755
--- a/out-reference/m5out/qsort_icache_FSH/simout
+++ b/out-reference/m5out/qsort_icache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339092
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339023
command line: ./prefix/bin/gem5.opt -r -d out/m5out/qsort_icache_FSH ./gem5script.py out/m5out/qsort_icache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/qsort_icache_FSH/stats.txt b/out-reference/m5out/qsort_icache_FSH/stats.txt
index 3f0ca60..2a8dc6a 100644
--- a/out-reference/m5out/qsort_icache_FSH/stats.txt
+++ b/out-reference/m5out/qsort_icache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.067492 # Nu
simTicks 67492454000 # Number of ticks simulated (Tick)
finalTick 67492454000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 148.49 # Real time elapsed on the host (Second)
-hostTickRate 454510954 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 152.27 # Real time elapsed on the host (Second)
+hostTickRate 443234984 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 631748 # Number of bytes of host memory used (Byte)
simInsts 19491447 # Number of instructions simulated (Count)
simOps 19491447 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 131260 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 131260 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 128004 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 128004 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 67492454 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/qsort_icache_REF/config.dot.pdf b/out-reference/m5out/qsort_icache_REF/config.dot.pdf
index 3b49338ab7fafb4f7e8803d37ce17f5b75246a04..63310509cbd88e740b02789cfa2a70c54621dd18 100644
GIT binary patch
delta 19
bcmaD>^sH#ZI&(H-BV$7Yqs?2)H!%VLSi=X%
delta 19
bcmaD>^sH#ZI&(H7BSRBo<IP*lH!%VLSlI{6
diff --git a/out-reference/m5out/qsort_icache_REF/simout b/out-reference/m5out/qsort_icache_REF/simout
index 3cdad54..f84fb38 100755
--- a/out-reference/m5out/qsort_icache_REF/simout
+++ b/out-reference/m5out/qsort_icache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339088
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339021
command line: ./prefix/bin/gem5.opt -r -d out/m5out/qsort_icache_REF ./gem5script.py out/m5out/qsort_icache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/qsort_icache_REF/stats.txt b/out-reference/m5out/qsort_icache_REF/stats.txt
index 6210704..ee9d06a 100644
--- a/out-reference/m5out/qsort_icache_REF/stats.txt
+++ b/out-reference/m5out/qsort_icache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.066006 # Nu
simTicks 66005941000 # Number of ticks simulated (Tick)
finalTick 66005941000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 146.40 # Real time elapsed on the host (Second)
-hostTickRate 450851402 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 155.71 # Real time elapsed on the host (Second)
+hostTickRate 423910290 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 631736 # Number of bytes of host memory used (Byte)
simInsts 18724994 # Number of instructions simulated (Count)
simOps 18724994 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 127900 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 127900 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 120257 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 120257 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 66005941 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/qsort_nocache_FSH/config.dot.pdf b/out-reference/m5out/qsort_nocache_FSH/config.dot.pdf
index 289f02ebc5eebd6df8126b1e2333e69700555dc6..14e1e4637d1cbbfc6518372f7dbb55504e1398e9 100644
GIT binary patch
delta 19
acmeCk>B!j-V8Ui>WNc_)v^mUV6C(ga^9DWu
delta 19
acmeCk>B!j-V8Ui(WN2b+ygAHd6C(gb2?jy{
diff --git a/out-reference/m5out/qsort_nocache_FSH/simout b/out-reference/m5out/qsort_nocache_FSH/simout
index 8aa222a..18b47e9 100755
--- a/out-reference/m5out/qsort_nocache_FSH/simout
+++ b/out-reference/m5out/qsort_nocache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339086
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339025
command line: ./prefix/bin/gem5.opt -r -d out/m5out/qsort_nocache_FSH ./gem5script.py out/m5out/qsort_nocache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/qsort_nocache_FSH/stats.txt b/out-reference/m5out/qsort_nocache_FSH/stats.txt
index ed7bde2..9e70b9c 100644
--- a/out-reference/m5out/qsort_nocache_FSH/stats.txt
+++ b/out-reference/m5out/qsort_nocache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 1.474912 # Nu
simTicks 1474912142000 # Number of ticks simulated (Tick)
finalTick 1474912142000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 194.88 # Real time elapsed on the host (Second)
-hostTickRate 7568279838 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 207.15 # Real time elapsed on the host (Second)
+hostTickRate 7119942803 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628252 # Number of bytes of host memory used (Byte)
simInsts 19491447 # Number of instructions simulated (Count)
simOps 19491447 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 100017 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 100017 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 94092 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 94092 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 1474912142 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/qsort_nocache_REF/config.dot.pdf b/out-reference/m5out/qsort_nocache_REF/config.dot.pdf
index 289f02ebc5eebd6df8126b1e2333e69700555dc6..14e1e4637d1cbbfc6518372f7dbb55504e1398e9 100644
GIT binary patch
delta 19
acmeCk>B!j-V8Ui>WNc_)v^mUV6C(ga^9DWu
delta 19
acmeCk>B!j-V8Ui(WN2b+ygAHd6C(gb2?jy{
diff --git a/out-reference/m5out/qsort_nocache_REF/simout b/out-reference/m5out/qsort_nocache_REF/simout
index a52d21e..1638834 100755
--- a/out-reference/m5out/qsort_nocache_REF/simout
+++ b/out-reference/m5out/qsort_nocache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339098
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339014
command line: ./prefix/bin/gem5.opt -r -d out/m5out/qsort_nocache_REF ./gem5script.py out/m5out/qsort_nocache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/qsort_nocache_REF/stats.txt b/out-reference/m5out/qsort_nocache_REF/stats.txt
index 66e3abd..d4df0da 100644
--- a/out-reference/m5out/qsort_nocache_REF/stats.txt
+++ b/out-reference/m5out/qsort_nocache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 1.435064 # Nu
simTicks 1435064283000 # Number of ticks simulated (Tick)
finalTick 1435064283000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 216.36 # Real time elapsed on the host (Second)
-hostTickRate 6632665748 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 193.06 # Real time elapsed on the host (Second)
+hostTickRate 7433067224 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628244 # Number of bytes of host memory used (Byte)
simInsts 18724994 # Number of instructions simulated (Count)
simOps 18724994 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 86544 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 86544 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 96988 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 96988 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 1435064283 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/rijndael_icache_FSH/config.dot.pdf b/out-reference/m5out/rijndael_icache_FSH/config.dot.pdf
index 6d36dee6666c8ff2c8e693e98614c8e12d147fed..18ca413ce0aa8e665c493b83aa8136907bb205cb 100644
GIT binary patch
delta 20
ccmaD>^sH#ZI&*eoBV$8D6SK`*%{MXv0AHgB0ssI2
delta 20
ccmaD>^sH#ZI&*d-BSRAtQ`5~`%{MXv0AIHV1poj5
diff --git a/out-reference/m5out/rijndael_icache_FSH/simout b/out-reference/m5out/rijndael_icache_FSH/simout
index 087ffc0..38f5b41 100755
--- a/out-reference/m5out/rijndael_icache_FSH/simout
+++ b/out-reference/m5out/rijndael_icache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:44:54
-gem5 executing on 05643258e4d3, pid 339472
+gem5 started Jan 3 2024 23:11:46
+gem5 executing on e6a95357fd5c, pid 339406
command line: ./prefix/bin/gem5.opt -r -d out/m5out/rijndael_icache_FSH ./gem5script.py out/m5out/rijndael_icache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/rijndael_icache_FSH/stats.txt b/out-reference/m5out/rijndael_icache_FSH/stats.txt
index ecdf93d..3f20c70 100644
--- a/out-reference/m5out/rijndael_icache_FSH/stats.txt
+++ b/out-reference/m5out/rijndael_icache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.104142 # Nu
simTicks 104142198000 # Number of ticks simulated (Tick)
finalTick 104142198000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 54.55 # Real time elapsed on the host (Second)
-hostTickRate 1908954158 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 54.96 # Real time elapsed on the host (Second)
+hostTickRate 1894874396 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 631436 # Number of bytes of host memory used (Byte)
simInsts 32740345 # Number of instructions simulated (Count)
simOps 32740345 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 600137 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 600137 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 595711 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 595711 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 104142198 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/rijndael_icache_REF/config.dot.pdf b/out-reference/m5out/rijndael_icache_REF/config.dot.pdf
index ea7ced78465b664287f6af4dcdad17b44ebe76e9..dfe017924853008d43dabfc040ace3b915d497a7 100644
GIT binary patch
delta 20
ccmaD>^sH#ZI&*eoBV$8DW0TEW%{MXv0AG*?{{R30
delta 20
ccmaD>^sH#ZI&*d-BSRAtV~fpO%{MXv0AITZ1^@s6
diff --git a/out-reference/m5out/rijndael_icache_REF/simout b/out-reference/m5out/rijndael_icache_REF/simout
index 5ef723f..aa6de47 100755
--- a/out-reference/m5out/rijndael_icache_REF/simout
+++ b/out-reference/m5out/rijndael_icache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:44:38
-gem5 executing on 05643258e4d3, pid 339457
+gem5 started Jan 3 2024 23:11:34
+gem5 executing on e6a95357fd5c, pid 339391
command line: ./prefix/bin/gem5.opt -r -d out/m5out/rijndael_icache_REF ./gem5script.py out/m5out/rijndael_icache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/rijndael_icache_REF/stats.txt b/out-reference/m5out/rijndael_icache_REF/stats.txt
index d94354c..974d3d6 100644
--- a/out-reference/m5out/rijndael_icache_REF/stats.txt
+++ b/out-reference/m5out/rijndael_icache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.103242 # Nu
simTicks 103241905000 # Number of ticks simulated (Tick)
finalTick 103241905000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 57.11 # Real time elapsed on the host (Second)
-hostTickRate 1807919568 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 54.86 # Real time elapsed on the host (Second)
+hostTickRate 1881768471 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 631428 # Number of bytes of host memory used (Byte)
simInsts 31939607 # Number of instructions simulated (Count)
simOps 31939607 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 559309 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 559309 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 582155 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 582155 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 103241905 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/rijndael_nocache_FSH/config.dot.pdf b/out-reference/m5out/rijndael_nocache_FSH/config.dot.pdf
index 2f607b65347ae9ea35103d3fbeb683038ffded2c..02d14b9eb51fcd730e313c156dcf4a399de3b42a 100644
GIT binary patch
delta 20
bcmeCk>B!j-V8U)}WNc_)YOy)oWFsR0Nwo%g
delta 20
bcmeCk>B!j-V8U)>WN2byV7fWnWFsR0Nt*_C
diff --git a/out-reference/m5out/rijndael_nocache_FSH/simout b/out-reference/m5out/rijndael_nocache_FSH/simout
index 2fac8b2..ca68f12 100755
--- a/out-reference/m5out/rijndael_nocache_FSH/simout
+++ b/out-reference/m5out/rijndael_nocache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:44:05
-gem5 executing on 05643258e4d3, pid 339442
+gem5 started Jan 3 2024 23:10:58
+gem5 executing on e6a95357fd5c, pid 339376
command line: ./prefix/bin/gem5.opt -r -d out/m5out/rijndael_nocache_FSH ./gem5script.py out/m5out/rijndael_nocache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/rijndael_nocache_FSH/stats.txt b/out-reference/m5out/rijndael_nocache_FSH/stats.txt
index 6dba053..776441d 100644
--- a/out-reference/m5out/rijndael_nocache_FSH/stats.txt
+++ b/out-reference/m5out/rijndael_nocache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 2.466151 # Nu
simTicks 2466151158000 # Number of ticks simulated (Tick)
finalTick 2466151158000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 160.61 # Real time elapsed on the host (Second)
-hostTickRate 15354636759 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 153.94 # Real time elapsed on the host (Second)
+hostTickRate 16019727963 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628096 # Number of bytes of host memory used (Byte)
simInsts 32740345 # Number of instructions simulated (Count)
simOps 32740345 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 203846 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 203846 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 212676 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 212676 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 2466151158 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/rijndael_nocache_REF/config.dot.pdf b/out-reference/m5out/rijndael_nocache_REF/config.dot.pdf
index 5ad8c39d98a3521a319545785e1d60b631164775..211cb19a258b0f93aeb59309a4c63ed2d7d07738 100644
GIT binary patch
delta 20
bcmeCk>B!j-V8U)}WNc_)YPLDtWFsR0NvQ^S
delta 20
bcmeCk>B!j-V8U)>WN2byV7NKlWFsR0NrMJ*
diff --git a/out-reference/m5out/rijndael_nocache_REF/simout b/out-reference/m5out/rijndael_nocache_REF/simout
index 61ed1dc..01e3adf 100755
--- a/out-reference/m5out/rijndael_nocache_REF/simout
+++ b/out-reference/m5out/rijndael_nocache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:44:01
-gem5 executing on 05643258e4d3, pid 339427
+gem5 started Jan 3 2024 23:10:56
+gem5 executing on e6a95357fd5c, pid 339361
command line: ./prefix/bin/gem5.opt -r -d out/m5out/rijndael_nocache_REF ./gem5script.py out/m5out/rijndael_nocache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/rijndael_nocache_REF/stats.txt b/out-reference/m5out/rijndael_nocache_REF/stats.txt
index 1141556..2e324a2 100644
--- a/out-reference/m5out/rijndael_nocache_REF/stats.txt
+++ b/out-reference/m5out/rijndael_nocache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 2.447525 # Nu
simTicks 2447525111000 # Number of ticks simulated (Tick)
finalTick 2447525111000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 161.52 # Real time elapsed on the host (Second)
-hostTickRate 15152824007 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 160.16 # Real time elapsed on the host (Second)
+hostTickRate 15281923110 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628088 # Number of bytes of host memory used (Byte)
simInsts 31939607 # Number of instructions simulated (Count)
simOps 31939607 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 197740 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 197740 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 199425 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 199425 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 2447525111 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/sha_icache_FSH/config.dot.pdf b/out-reference/m5out/sha_icache_FSH/config.dot.pdf
index ed92f59a83dc3802b25592b529d1635ceb89d763..363db4b76b88ad97370dfc07404d350d763a7924 100644
GIT binary patch
delta 20
ccmaD>^sH#ZI&*eoBV$7&Bg@TO%{MXv0AH^N1ONa4
delta 20
ccmaD>^sH#ZI&*d-BSRBYW7ExB%{MXv0AH~P1ONa4
diff --git a/out-reference/m5out/sha_icache_FSH/simout b/out-reference/m5out/sha_icache_FSH/simout
index d327257..b783b55 100755
--- a/out-reference/m5out/sha_icache_FSH/simout
+++ b/out-reference/m5out/sha_icache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:45:35
-gem5 executing on 05643258e4d3, pid 339532
+gem5 started Jan 3 2024 23:12:29
+gem5 executing on e6a95357fd5c, pid 339466
command line: ./prefix/bin/gem5.opt -r -d out/m5out/sha_icache_FSH ./gem5script.py out/m5out/sha_icache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/sha_icache_FSH/stats.txt b/out-reference/m5out/sha_icache_FSH/stats.txt
index 32ef687..b582d63 100644
--- a/out-reference/m5out/sha_icache_FSH/stats.txt
+++ b/out-reference/m5out/sha_icache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.043533 # Nu
simTicks 43532825000 # Number of ticks simulated (Tick)
finalTick 43532825000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 14.71 # Real time elapsed on the host (Second)
-hostTickRate 2959217408 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 13.91 # Real time elapsed on the host (Second)
+hostTickRate 3130298666 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 631396 # Number of bytes of host memory used (Byte)
simInsts 16680275 # Number of instructions simulated (Count)
simOps 16680275 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 1133856 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 1133855 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 1199408 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 1199407 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 43532825 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/sha_icache_REF/config.dot.pdf b/out-reference/m5out/sha_icache_REF/config.dot.pdf
index eb0b18164aa0180fbc54498ac0a64c5140b82d5b..9bd4277c33c02dfbc79b4e4fb20f5428c0d366d7 100644
GIT binary patch
delta 20
ccmaD>^sH#ZI&*eoBV$7&Bcsh*%{MXv0AGa%{Qv*}
delta 20
ccmaD>^sH#ZI&*d-BSRBYBlFE$%{MXv0AIEU1poj5
diff --git a/out-reference/m5out/sha_icache_REF/simout b/out-reference/m5out/sha_icache_REF/simout
index 889bab9..6e8c2a4 100755
--- a/out-reference/m5out/sha_icache_REF/simout
+++ b/out-reference/m5out/sha_icache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:45:27
-gem5 executing on 05643258e4d3, pid 339517
+gem5 started Jan 3 2024 23:12:22
+gem5 executing on e6a95357fd5c, pid 339451
command line: ./prefix/bin/gem5.opt -r -d out/m5out/sha_icache_REF ./gem5script.py out/m5out/sha_icache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/sha_icache_REF/stats.txt b/out-reference/m5out/sha_icache_REF/stats.txt
index c8cb683..e79e283 100644
--- a/out-reference/m5out/sha_icache_REF/stats.txt
+++ b/out-reference/m5out/sha_icache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.042682 # Nu
simTicks 42681665000 # Number of ticks simulated (Tick)
finalTick 42681665000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 18.68 # Real time elapsed on the host (Second)
-hostTickRate 2284731866 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 12.12 # Real time elapsed on the host (Second)
+hostTickRate 3521164518 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 631428 # Number of bytes of host memory used (Byte)
simInsts 14491444 # Number of instructions simulated (Count)
simOps 14491444 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 775717 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 775716 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 1195505 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 1195504 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 42681665 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/sha_nocache_FSH/config.dot.pdf b/out-reference/m5out/sha_nocache_FSH/config.dot.pdf
index cdc057f028349a5fa64f105ffa002f1c3fc43c03..a22a46b4faf9a97432ae5835e1804d05b01ed03a 100644
GIT binary patch
delta 20
bcmeCk>B!j-V8U)}WNc_;Xt_DuWFsR0Nv{TZ
delta 20
bcmeCk>B!j-V8U)>WN2b)WUx8hWFsR0Ns|V2
diff --git a/out-reference/m5out/sha_nocache_FSH/simout b/out-reference/m5out/sha_nocache_FSH/simout
index 069b266..692f625 100755
--- a/out-reference/m5out/sha_nocache_FSH/simout
+++ b/out-reference/m5out/sha_nocache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:45:20
-gem5 executing on 05643258e4d3, pid 339502
+gem5 started Jan 3 2024 23:12:19
+gem5 executing on e6a95357fd5c, pid 339436
command line: ./prefix/bin/gem5.opt -r -d out/m5out/sha_nocache_FSH ./gem5script.py out/m5out/sha_nocache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/sha_nocache_FSH/stats.txt b/out-reference/m5out/sha_nocache_FSH/stats.txt
index 2d2b75d..ff71405 100644
--- a/out-reference/m5out/sha_nocache_FSH/stats.txt
+++ b/out-reference/m5out/sha_nocache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 1.091543 # Nu
simTicks 1091542735000 # Number of ticks simulated (Tick)
finalTick 1091542735000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 47.45 # Real time elapsed on the host (Second)
-hostTickRate 23002720628 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 52.64 # Real time elapsed on the host (Second)
+hostTickRate 20737334593 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628064 # Number of bytes of host memory used (Byte)
simInsts 16680275 # Number of instructions simulated (Count)
simOps 16680275 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 351512 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 351512 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 316894 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 316894 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 1091542735 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/sha_nocache_REF/config.dot.pdf b/out-reference/m5out/sha_nocache_REF/config.dot.pdf
index afa970d0d7f9ad47d629de4175bac2574352c24d..ea1742ffd9d458a7947d80a62bd4ea760907d4a4 100644
GIT binary patch
delta 20
bcmeCk>B!j-V8U)}WNc_;V7@urWFsR0Nt_0D
delta 20
bcmeCk>B!j-V8U)>WN2b)Xtp`rWFsR0Nw5Za
diff --git a/out-reference/m5out/sha_nocache_REF/simout b/out-reference/m5out/sha_nocache_REF/simout
index 71efa8c..35ff411 100755
--- a/out-reference/m5out/sha_nocache_REF/simout
+++ b/out-reference/m5out/sha_nocache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:45:16
-gem5 executing on 05643258e4d3, pid 339487
+gem5 started Jan 3 2024 23:12:07
+gem5 executing on e6a95357fd5c, pid 339421
command line: ./prefix/bin/gem5.opt -r -d out/m5out/sha_nocache_REF ./gem5script.py out/m5out/sha_nocache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/sha_nocache_REF/stats.txt b/out-reference/m5out/sha_nocache_REF/stats.txt
index dffdc5b..a5aa01a 100644
--- a/out-reference/m5out/sha_nocache_REF/stats.txt
+++ b/out-reference/m5out/sha_nocache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 1.069454 # Nu
simTicks 1069453961000 # Number of ticks simulated (Tick)
finalTick 1069453961000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 58.15 # Real time elapsed on the host (Second)
-hostTickRate 18391316794 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 57.07 # Real time elapsed on the host (Second)
+hostTickRate 18738664560 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628060 # Number of bytes of host memory used (Byte)
simInsts 14491444 # Number of instructions simulated (Count)
simOps 14491444 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 249208 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 249208 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 253914 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 253914 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 1069453961 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/susan_icache_FSH/config.dot.pdf b/out-reference/m5out/susan_icache_FSH/config.dot.pdf
index 3b49338ab7fafb4f7e8803d37ce17f5b75246a04..63310509cbd88e740b02789cfa2a70c54621dd18 100644
GIT binary patch
delta 19
bcmaD>^sH#ZI&(H-BV$7Yqs?2)H!%VLSi=X%
delta 19
bcmaD>^sH#ZI&(H7BSRBo<IP*lH!%VLSlI{6
diff --git a/out-reference/m5out/susan_icache_FSH/simout b/out-reference/m5out/susan_icache_FSH/simout
index a71f331..12c9f20 100755
--- a/out-reference/m5out/susan_icache_FSH/simout
+++ b/out-reference/m5out/susan_icache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339101
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339037
command line: ./prefix/bin/gem5.opt -r -d out/m5out/susan_icache_FSH ./gem5script.py out/m5out/susan_icache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/susan_icache_FSH/stats.txt b/out-reference/m5out/susan_icache_FSH/stats.txt
index d2b1d7f..a28e435 100644
--- a/out-reference/m5out/susan_icache_FSH/stats.txt
+++ b/out-reference/m5out/susan_icache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.065652 # Nu
simTicks 65651728000 # Number of ticks simulated (Tick)
finalTick 65651728000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 27.90 # Real time elapsed on the host (Second)
-hostTickRate 2353449728 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
-hostMemory 631596 # Number of bytes of host memory used (Byte)
+hostSeconds 28.50 # Real time elapsed on the host (Second)
+hostTickRate 2303765211 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostMemory 631592 # Number of bytes of host memory used (Byte)
simInsts 26040268 # Number of instructions simulated (Count)
simOps 26040268 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 933474 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 933474 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 913766 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 913765 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 65651728 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/susan_icache_REF/config.dot.pdf b/out-reference/m5out/susan_icache_REF/config.dot.pdf
index ec795f686c11446f5ae48dfe27c73808a0d76ca1..63310509cbd88e740b02789cfa2a70c54621dd18 100644
GIT binary patch
delta 20
ccmaD>^sH#ZI&*eoBV$7YBeTt0%{MXv0AGy<{{R30
delta 20
ccmaD>^sH#ZI&*d-BSRBoWAn{h%{MXv0AH;L1ONa4
diff --git a/out-reference/m5out/susan_icache_REF/simout b/out-reference/m5out/susan_icache_REF/simout
index 640a7c4..5074bc2 100755
--- a/out-reference/m5out/susan_icache_REF/simout
+++ b/out-reference/m5out/susan_icache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339097
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339034
command line: ./prefix/bin/gem5.opt -r -d out/m5out/susan_icache_REF ./gem5script.py out/m5out/susan_icache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/susan_icache_REF/stats.txt b/out-reference/m5out/susan_icache_REF/stats.txt
index 386d07e..bb8b35f 100644
--- a/out-reference/m5out/susan_icache_REF/stats.txt
+++ b/out-reference/m5out/susan_icache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 0.067608 # Nu
simTicks 67607890000 # Number of ticks simulated (Tick)
finalTick 67607890000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 23.94 # Real time elapsed on the host (Second)
-hostTickRate 2824625312 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
-hostMemory 631568 # Number of bytes of host memory used (Byte)
+hostSeconds 31.52 # Real time elapsed on the host (Second)
+hostTickRate 2144810081 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostMemory 631564 # Number of bytes of host memory used (Byte)
simInsts 20392777 # Number of instructions simulated (Count)
simOps 20392777 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 851996 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 851996 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 646942 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 646942 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 67607890 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/susan_nocache_FSH/config.dot.pdf b/out-reference/m5out/susan_nocache_FSH/config.dot.pdf
index 289f02ebc5eebd6df8126b1e2333e69700555dc6..14e1e4637d1cbbfc6518372f7dbb55504e1398e9 100644
GIT binary patch
delta 19
acmeCk>B!j-V8Ui>WNc_)v^mUV6C(ga^9DWu
delta 19
acmeCk>B!j-V8Ui(WN2b+ygAHd6C(gb2?jy{
diff --git a/out-reference/m5out/susan_nocache_FSH/simout b/out-reference/m5out/susan_nocache_FSH/simout
index 51c8b8c..715ff7e 100755
--- a/out-reference/m5out/susan_nocache_FSH/simout
+++ b/out-reference/m5out/susan_nocache_FSH/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339093
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339031
command line: ./prefix/bin/gem5.opt -r -d out/m5out/susan_nocache_FSH ./gem5script.py out/m5out/susan_nocache_FSH
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/susan_nocache_FSH/stats.txt b/out-reference/m5out/susan_nocache_FSH/stats.txt
index 596ef56..74da6e7 100644
--- a/out-reference/m5out/susan_nocache_FSH/stats.txt
+++ b/out-reference/m5out/susan_nocache_FSH/stats.txt
@@ -4,13 +4,13 @@ simSeconds 1.691916 # Nu
simTicks 1691915517000 # Number of ticks simulated (Tick)
finalTick 1691915517000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 99.50 # Real time elapsed on the host (Second)
-hostTickRate 17004000104 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 100.74 # Real time elapsed on the host (Second)
+hostTickRate 16794228559 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628116 # Number of bytes of host memory used (Byte)
simInsts 26040268 # Number of instructions simulated (Count)
simOps 26040268 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 261708 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 261708 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 258479 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 258479 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 1691915517 # Number of cpu cycles simulated (Cycle)
diff --git a/out-reference/m5out/susan_nocache_REF/config.dot.pdf b/out-reference/m5out/susan_nocache_REF/config.dot.pdf
index cc40db2e26db375f6cddf322fb9fe96e387bbacf..14e1e4637d1cbbfc6518372f7dbb55504e1398e9 100644
GIT binary patch
delta 20
bcmeCk>B!j-V8U)}WNc_)WVSinWFsR0Nt6b4
delta 20
bcmeCk>B!j-V8U)>WN2b+Y`!_%WFsR0Nwfxf
diff --git a/out-reference/m5out/susan_nocache_REF/simout b/out-reference/m5out/susan_nocache_REF/simout
index b144f7c..262c2e0 100755
--- a/out-reference/m5out/susan_nocache_REF/simout
+++ b/out-reference/m5out/susan_nocache_REF/simout
@@ -3,8 +3,8 @@ gem5 is copyrighted software; use the --copyright option for details.
gem5 version 22.1.0.0
gem5 compiled Jan 2 2024 19:25:23
-gem5 started Jan 2 2024 21:43:36
-gem5 executing on 05643258e4d3, pid 339100
+gem5 started Jan 3 2024 23:10:26
+gem5 executing on e6a95357fd5c, pid 339030
command line: ./prefix/bin/gem5.opt -r -d out/m5out/susan_nocache_REF ./gem5script.py out/m5out/susan_nocache_REF
info: Standard input is not a terminal, disabling listeners.
diff --git a/out-reference/m5out/susan_nocache_REF/stats.txt b/out-reference/m5out/susan_nocache_REF/stats.txt
index 846ff1c..6954e41 100644
--- a/out-reference/m5out/susan_nocache_REF/stats.txt
+++ b/out-reference/m5out/susan_nocache_REF/stats.txt
@@ -4,13 +4,13 @@ simSeconds 1.905635 # Nu
simTicks 1905635383000 # Number of ticks simulated (Tick)
finalTick 1905635383000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) (Tick)
simFreq 1000000000000 # The number of ticks per simulated second ((Tick/Second))
-hostSeconds 129.68 # Real time elapsed on the host (Second)
-hostTickRate 14694562810 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
+hostSeconds 155.19 # Real time elapsed on the host (Second)
+hostTickRate 12279261800 # The number of ticks simulated per host second (ticks/s) ((Tick/Second))
hostMemory 628092 # Number of bytes of host memory used (Byte)
simInsts 20392777 # Number of instructions simulated (Count)
simOps 20392777 # Number of ops (including micro ops) simulated (Count)
-hostInstRate 157251 # Simulator instruction rate (inst/s) ((Count/Second))
-hostOpRate 157251 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
+hostInstRate 131404 # Simulator instruction rate (inst/s) ((Count/Second))
+hostOpRate 131404 # Simulator op (including micro ops) rate (op/s) ((Count/Second))
system.clk_domain.clock 1000 # Clock period in ticks (Tick)
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts (Volt)
system.cpu.numCycles 1905635383 # Number of cpu cycles simulated (Cycle)
--
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