From e6ced26afd50b0d74b8ea14ca1cd62cdc5d11ae8 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Mon, 16 Dec 2019 10:00:07 +1030
Subject: [PATCH] ubsan: xstormy16: left shift of negative value
cpu/
* xstormy16.cpu (f-rel12a): Avoid signed overflow.
opcodes/
* xstormy16-ibld.c: Regenerate.
---
cpu/ChangeLog | 4 ++++
cpu/xstormy16.cpu | 2 +-
opcodes/ChangeLog | 4 ++++
opcodes/xstormy16-ibld.c | 2 +-
4 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index c5a44ab45f0..688c5960a33 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,7 @@
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * xstormy16.cpu (f-rel12a): Avoid signed overflow.
+
2019-12-11 Alan Modra <amodra@gmail.com>
* epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
diff --git a/cpu/xstormy16.cpu b/cpu/xstormy16.cpu
index ae7e042c92b..aa5a464fa61 100644
--- a/cpu/xstormy16.cpu
+++ b/cpu/xstormy16.cpu
@@ -393,7 +393,7 @@
(length 11)
(mode INT)
(encode (value pc) (sra SI (sub SI value (add SI pc 2)) 1))
- (decode (value pc) (add SI (sll value 1) (add SI pc 2)))
+ (decode (value pc) (add SI (mul value 2) (add SI pc 2)))
)
(dnop rel12a "12 bit relative address" () h-uint f-rel12a)
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ce56ec02312..1e13b1f7346 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * xstormy16-ibld.c: Regenerate.
+
2019-12-16 Alan Modra <amodra@gmail.com>
* score-dis.c (print_insn_score16): Move rpush/rpop imm field
diff --git a/opcodes/xstormy16-ibld.c b/opcodes/xstormy16-ibld.c
index babdd46def9..69da9867849 100644
--- a/opcodes/xstormy16-ibld.c
+++ b/opcodes/xstormy16-ibld.c
@@ -800,7 +800,7 @@ xstormy16_cgen_extract_operand (CGEN_CPU_DESC cd,
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, pc, & value);
- value = ((((value) << (1))) + (((pc) + (2))));
+ value = ((((value) * (2))) + (((pc) + (2))));
fields->f_rel12a = value;
}
break;
--
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