diff --git a/sim/.Sanitize b/sim/.Sanitize
new file mode 100644
index 0000000000000000000000000000000000000000..f64492d0b1ae2e9826a87911e1efbf7098acb8c0
--- /dev/null
+++ b/sim/.Sanitize
@@ -0,0 +1,34 @@
+# .Sanitize for devo/sim.
+
+# Each directory to survive it's way into a release will need a file
+# like this one called "./.Sanitize". All keyword lines must exist,
+# and must exist in the order specified by this file. Each directory
+# in the tree will be processed, top down, in the following order.
+
+# Hash started lines like this one are comments and will be deleted
+# before anything else is done. Blank lines will also be squashed
+# out.
+
+# The lines between the "Do-first:" line and the "Things-to-keep:"
+# line are executed as a /bin/sh shell script before anything else is
+# done in this
+
+Do-first:
+
+# All files listed between the "Things-to-keep:" line and the
+# "Files-to-sed:" line will be kept. All other files will be removed.
+# Directories listed in this section will have their own Sanitize
+# called. Directories not listed will be removed in their entirety
+# with rm -rf.
+
+Things-to-keep:
+
+configure.in
+config
+hosts
+h8300
+z8k
+
+Do-last:
+
+# End of file.
diff --git a/sim/configure.in b/sim/configure.in
new file mode 100644
index 0000000000000000000000000000000000000000..d576bcebdd9871c2d292a80ca0f02facf728687b
--- /dev/null
+++ b/sim/configure.in
@@ -0,0 +1,37 @@
+# This file is a shell script that supplies the information necessary
+# to tailor a template configure script into the configure script
+# appropriate for this directory. For more information, check any
+# existing configure script.
+
+configdirs="h8300 z8k"
+srctrigger=Makefile.in
+srcname="sim"
+target_dependent=true
+
+# per-host:
+
+
+# per-target:
+
+# WHEN ADDING ENTRIES TO THIS MATRIX:
+# Make sure that the left side always has two dashes. Otherwise you
+# can get spurious matches. Even for unambiguous cases, do this as a
+# convention, else the table becomes a real mess to understand and maintain.
+
+case "${target}" in
+ h8300-*-*) sim_target=h8300 ;;
+ z8k*-*-*) sim_target=z8k ;;
+esac
+
+configdirs=${sim_target}
+
+if [ ! -f ${srcdir}/${sim_target}/${sim_target}.mt ] ; then
+ if [ -n "${sim_target}" ] ; then
+ echo '***' No file ${srcdir}/${sim_target}/${sim_target}.mt 1>&2
+ fi
+ echo '***' The simulator does not support target ${target} 1>&2
+else
+target_makefile_frag=${sim_target}/${sim_target}.mt
+fi
+# post-target:
+
diff --git a/sim/h8300/.Sanitize b/sim/h8300/.Sanitize
index 4a39396a42bf3bf4416d01782bf6917cd4d685e3..32631d676aafe461a1eed249241e31f7eea3a5a8 100644
--- a/sim/h8300/.Sanitize
+++ b/sim/h8300/.Sanitize
@@ -28,6 +28,7 @@ Things-to-keep:
ChangeLog
Makefile.in
configure.in
+h8300.mt
writecode.c
run.c
p1.c
diff --git a/sim/h8300/Makefile.in b/sim/h8300/Makefile.in
index abb3f6f17add1e5715dbd25df7b1281e9824b692..0e48037f0b1e23c56b62eb9cadba99026a67e7b7 100644
--- a/sim/h8300/Makefile.in
+++ b/sim/h8300/Makefile.in
@@ -53,8 +53,8 @@ BISON = bison
MAKEINFO = makeinfo
RANLIB = ranlib
-INCDIR = $(srcdir)/../include
-CSEARCH = -I. -I$(srcdir) -I$(INCDIR) -I$(srcdir)/../bfd
+INCDIR = $(srcdir)/../../include
+CSEARCH = -I. -I$(srcdir) -I$(INCDIR) -I$(srcdir)/../../bfd
DEP = mkdep
#### host, target, and site specific Makefile frags come in here.
@@ -62,7 +62,7 @@ DEP = mkdep
all: run
run: code.o run.o perifs.o
- $(CC) -o run code.o perifs.o run.o ../bfd/libbfd.a ../libiberty/libiberty.a
+ $(CC) -o run code.o perifs.o run.o ../../bfd/libbfd.a ../../libiberty/libiberty.a
code.c:p1.c p2.c p3.c
cat $(VPATH)/p1.c p2.c $(VPATH)/p3.c | cb >code.c
diff --git a/sim/h8300/configure.in b/sim/h8300/configure.in
index 8d7b0aa1fd69688a17a1d6eced487a96272577af..bd30158316f5630dd6e858d5a9b6d00e13c9d648 100644
--- a/sim/h8300/configure.in
+++ b/sim/h8300/configure.in
@@ -4,14 +4,14 @@
# existing configure script.
srctrigger=writecode.c
-srcname="sim"
+srcname="h8300sim"
# per-host:
-. ${srcdir}/../bfd/configure.host
+. ${srcdir}/../../bfd/configure.host
# Set up to make a link between the host's include file and "sysdep.h".
-files="../bfd/hosts/${my_host}.h"
+files="../../bfd/hosts/${my_host}.h"
links="sysdep.h"
@@ -24,8 +24,8 @@ if [ ! -f ${srcdir}/${files} ] ; then
fi
host_makefile_frag=
-if [ -f ${srcdir}/../bfd/config/${my_host}.mh ] ; then
- host_makefile_frag=../bfd/config/${my_host}.mh
+if [ -f ${srcdir}/../../bfd/config/${my_host}.mh ] ; then
+ host_makefile_frag=../../bfd/config/${my_host}.mh
fi
# per-target:
diff --git a/sim/h8300/h8300.mt b/sim/h8300/h8300.mt
new file mode 100644
index 0000000000000000000000000000000000000000..66bd6d66136a9b7bb69aa722fdad8f9b166f7cee
--- /dev/null
+++ b/sim/h8300/h8300.mt
@@ -0,0 +1 @@
+ALL=all-h8300
diff --git a/sim/h8300/p1.c b/sim/h8300/p1.c
index da139d5df42153acb4d1667c67d4b7110fd82bba..f22657e3d2f0aedd022537e749e4b07fe2addfca 100644
--- a/sim/h8300/p1.c
+++ b/sim/h8300/p1.c
@@ -1,5 +1,5 @@
/* H8/300 simulator
- Copyright 1992 Free Software Foundation, Inc.
+ Copyright 1993 Free Software Foundation, Inc.
Contributed by Cygnus Support.
Written by Steve Chamberlain (sac@cygnus.com).
diff --git a/sim/h8300/p3.c b/sim/h8300/p3.c
index d0fa908303855036038f62996c53cf085eeeb559..74015b643a4cfe7a222da7ae07b2c0f3cd1c5dc9 100644
--- a/sim/h8300/p3.c
+++ b/sim/h8300/p3.c
@@ -1,3 +1,24 @@
+/* Tail end of H8/300 simulator
+ Copyright 1993 Free Software Foundation, Inc.
+
+ Contributed by Cygnus Support.
+ Written by Steve Chamberlain (sac@cygnus.com).
+
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
movflags8:
n = dst & 0x80;
z = !(dst & 0xff);
diff --git a/sim/h8300/perifs.c b/sim/h8300/perifs.c
index 73804643a9bc25b111e6d55393f781b7eb689058..b9232141d2be9514be3160e4b5c549a63e9e00f4 100644
--- a/sim/h8300/perifs.c
+++ b/sim/h8300/perifs.c
@@ -1,3 +1,23 @@
+/* H8/300 simulator
+ Copyright 1993 Free Software Foundation, Inc.
+
+ Contributed by Cygnus Support.
+ Written by Steve Chamberlain (sac@cygnus.com).
+
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* Fake peripherals for the H8/330 */
#include "state.h"
diff --git a/sim/h8300/writecode.c b/sim/h8300/writecode.c
index 93b7568a10675e041cba9968ca11e3c0b4c88198..ba875edff9f92616250aab4cafdee8d3572fb20e 100644
--- a/sim/h8300/writecode.c
+++ b/sim/h8300/writecode.c
@@ -1,5 +1,5 @@
/* code generator for the Hitachi H8/300 architecture simulator.
- Copyright (C) 1990-1991 Free Software Foundation, Inc.
+ Copyright (C) 1993 Free Software Foundation, Inc.
Hacked by Steve Chamberlain of Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
@@ -328,7 +328,6 @@ decode (p, fetch, size)
}
}
-
static void
esleep ()
{
@@ -460,7 +459,7 @@ rte (p, a, s)
printf ("tmp = reg[7];\n");
printf ("reg[7]+=2;\n");
printf ("SET_CCR(tmp);\n");
- printf("npc = saved_state.mem + (WORD_MEM(tmp)>>1);\n");
+ printf ("npc = saved_state.mem + (WORD_MEM(tmp)>>1);\n");
}
static void
@@ -648,80 +647,301 @@ struct
table [] =
{
- { nx, 1, "bld", bit, "dst = srcb; c = (srcb>>srca)&1;", 8 } ,
- { nx, 1, "bild", bit, "dst = srcb; c = !((srcb>>srca)&1);", 8 } ,
- { nx, 1, "band", bit, "dst = srcb; c = C &&((srcb>>srca)&1);", 8 } ,
- { nx, 1, "biand", bit, "dst = srcb; c = C &&(!((srcb>>srca)&1));", 8 } ,
- { nx, 1, "bior", bit, "dst = srcb; c = C ||(!((srcb>>srca)&1));", 8 } ,
- { nx, 1, "bor", bit, "dst = srcb; c = C ||(((srcb>>srca)&1));", 8 } ,
- { nx, 1, "bixor", bit, "dst = srcb; c = C ^(!((srcb>>srca)&1));", 8 } ,
- { nx, 1, "bxor", bit, "dst = srcb; c = C ^(((srcb>>srca)&1));", 8 } ,
- { nx, 1, "bnot", bit, "dst = srcb ^ (1<<srca);", 8 } ,
- { nx, 1, "bclr", bit, "dst = srcb & ~(1<<srca);", 8 } ,
- { nx, 1, "bset", bit, "dst = srcb | (1<<srca);", 8 } ,
- { nx, 1, "bst", bit, "dst = (srcb & ~(1<<srca))| ((C)<<srca);", 8 } ,
- { nx, 1, "bist", bit, "dst = (srcb & ~(1<<srca))| ((!C)<<srca);", 8 } ,
- { nx, 1, "btst", bit, "dst = srcb; z = !((srcb>>srca)&1);", 8 } ,
- { icf, 0, "dec", dec, 0, 0 } ,
- { icf, 0, "inc", inc, 0, 0 } ,
- { saf, 1, "orc", setf, "|", 0 } ,
- { saf, 1, "xorc", setf, "^", 0 } ,
- { saf, 1, "andc", setf, "&", 0 } ,
- { nx, 1, "nop", nop, 0, 0 } ,
- { nx, 1, "bra", bra, "1", 0 } ,
- { nx, 1, "brn", bra, "0", 0 } ,
- { nx, 1, "bhi", bra, "(C||Z)==0", 0 } ,
- { nx, 1, "bls", bra, "(C||Z)==1", 0 } ,
- { nx, 1, "bcs", bra, "C==1", 0 } ,
- { nx, 1, "bcc", bra, "C==0", 0 } ,
- { nx, 1, "bpl", bra, "N==0", 0 } ,
- { nx, 1, "bmi", bra, "N==1", 0 } ,
- { nx, 1, "bvs", bra, "V==1", 0 } ,
- { nx, 1, "bvc", bra, "V==0", 0 } ,
- { nx, 1, "bge", bra, "(N^V)==0", 0 } ,
- { nx, 1, "bgt", bra, "(Z|(N^V))==0", 0 } ,
- { nx, 1, "blt", bra, "(N^V)==1", 0 } ,
- { nx, 1, "ble", bra, "(Z|(N^V))==1", 0 } ,
- { nx, 1, "beq", bra, "Z==1", 0 } ,
- { nx, 1, "bne", bra, "Z==0", 0 } ,
- { nx, 1, "bsr", bsr, "", 0 } ,
- { nx, 1, "jsr", jsr, 0, 0 } ,
- { nx, 1, "jmp", jmp, 0, 0 } ,
- { nx, 0, "rts", rts, 0, 0 } ,
- { nx, 0, "rte", rte, 0, 0 } ,
- { nx, 1, "andc", andc, 0, 0 } ,
- { sf, 1, "shal", shal, 0, 0 } ,
- { sf, 1, "shar", shar, 0, 0 } ,
- { sf, 1, "shll", shll, 0, 0 } ,
- { sf, 1, "shlr", shlr, 0, 0 } ,
- { sf, 1, "rotxl", rotxl, 0, 0 } ,
- { sf, 1, "rotxr", rotxr, 0, 0 } ,
- { sf, 1, "rotl", rotl, 0, 0 } ,
- { sf, 1, "rotr", rotr, 0, 0 } ,
- { lf, 1, "xor", log, "^", 0 } ,
- { lf, 1, "and", log, "&", 0 } ,
- { lf, 1, "or", log, "|", 0 } ,
- { lf, 1, "not", ulog, " ~", 0 } ,
- { lf, 1, "neg", ulog, " - ", 0 } ,
- { nx, 1, "adds", adds, "dst = srca + srcb", 0 } ,
- { nx, 1, "subs", adds, "srca = -srca; dst = srcb + srca", 0 } ,
- { af8, 1, "add.b", add, "dst = srca + srcb", 8 } ,
- { af16, 1, "add.w", add, "dst = srca + srcb", 16 } ,
- { af16, 1, "sub.w", add, "srca = -srca; dst = srcb + srca", 16 } ,
- { af8, 1, "sub.b", add, "srca = -srca; dst = srcb + srca", 8 } ,
- { af8, 1, "addx", addx, 0, 8 } ,
- { af8, 1, "subx", subx, 0, 8 } ,
- { af8, 0, "cmp.b", cmp, 0, 8 } ,
- { af16, 0, "cmp.w", cmp, 0, 16 } ,
- { nx, 1, "sleep", esleep, 0, 0 } ,
- { nx, 0, "bpt", bpt, 0, 8 } ,
- { nx, 0, "divxu", divxu, 0, 0 } ,
- { nx, 0, "mulxu", mulxu, 0, 0 } ,
- { mf8, 1, "mov.b", mov, 0, 8 } ,
- { mf8, 1, "movtpe", mov, 0, 8 } ,
- { mf8, 1, "movfpe", mov, 0, 8 } ,
- { mf16, 1, "mov.w", mov, 0, 16 } ,
- { 0 }
+ {
+ nx, 1, "bld", bit, "dst = srcb; c = (srcb>>srca)&1;", 8
+ }
+ ,
+ {
+ nx, 1, "bild", bit, "dst = srcb; c = !((srcb>>srca)&1);", 8
+ }
+ ,
+ {
+ nx, 1, "band", bit, "dst = srcb; c = C &&((srcb>>srca)&1);", 8
+ }
+ ,
+ {
+ nx, 1, "biand", bit, "dst = srcb; c = C &&(!((srcb>>srca)&1));", 8
+ }
+ ,
+ {
+ nx, 1, "bior", bit, "dst = srcb; c = C ||(!((srcb>>srca)&1));", 8
+ }
+ ,
+ {
+ nx, 1, "bor", bit, "dst = srcb; c = C ||(((srcb>>srca)&1));", 8
+ }
+ ,
+ {
+ nx, 1, "bixor", bit, "dst = srcb; c = C ^(!((srcb>>srca)&1));", 8
+ }
+ ,
+ {
+ nx, 1, "bxor", bit, "dst = srcb; c = C ^(((srcb>>srca)&1));", 8
+ }
+ ,
+ {
+ nx, 1, "bnot", bit, "dst = srcb ^ (1<<srca);", 8
+ }
+ ,
+ {
+ nx, 1, "bclr", bit, "dst = srcb & ~(1<<srca);", 8
+ }
+ ,
+ {
+ nx, 1, "bset", bit, "dst = srcb | (1<<srca);", 8
+ }
+ ,
+ {
+ nx, 1, "bst", bit, "dst = (srcb & ~(1<<srca))| ((C)<<srca);", 8
+ }
+ ,
+ {
+ nx, 1, "bist", bit, "dst = (srcb & ~(1<<srca))| ((!C)<<srca);", 8
+ }
+ ,
+ {
+ nx, 1, "btst", bit, "dst = srcb; z = !((srcb>>srca)&1);", 8
+ }
+ ,
+ {
+ icf, 0, "dec", dec, 0, 0
+ }
+ ,
+ {
+ icf, 0, "inc", inc, 0, 0
+ }
+ ,
+ {
+ saf, 1, "orc", setf, "|", 0
+ }
+ ,
+ {
+ saf, 1, "xorc", setf, "^", 0
+ }
+ ,
+ {
+ saf, 1, "andc", setf, "&", 0
+ }
+ ,
+ {
+ nx, 1, "nop", nop, 0, 0
+ }
+ ,
+ {
+ nx, 1, "bra", bra, "1", 0
+ }
+ ,
+ {
+ nx, 1, "brn", bra, "0", 0
+ }
+ ,
+ {
+ nx, 1, "bhi", bra, "(C||Z)==0", 0
+ }
+ ,
+ {
+ nx, 1, "bls", bra, "(C||Z)==1", 0
+ }
+ ,
+ {
+ nx, 1, "bcs", bra, "C==1", 0
+ }
+ ,
+ {
+ nx, 1, "bcc", bra, "C==0", 0
+ }
+ ,
+ {
+ nx, 1, "bpl", bra, "N==0", 0
+ }
+ ,
+ {
+ nx, 1, "bmi", bra, "N==1", 0
+ }
+ ,
+ {
+ nx, 1, "bvs", bra, "V==1", 0
+ }
+ ,
+ {
+ nx, 1, "bvc", bra, "V==0", 0
+ }
+ ,
+ {
+ nx, 1, "bge", bra, "(N^V)==0", 0
+ }
+ ,
+ {
+ nx, 1, "bgt", bra, "(Z|(N^V))==0", 0
+ }
+ ,
+ {
+ nx, 1, "blt", bra, "(N^V)==1", 0
+ }
+ ,
+ {
+ nx, 1, "ble", bra, "(Z|(N^V))==1", 0
+ }
+ ,
+ {
+ nx, 1, "beq", bra, "Z==1", 0
+ }
+ ,
+ {
+ nx, 1, "bne", bra, "Z==0", 0
+ }
+ ,
+ {
+ nx, 1, "bsr", bsr, "", 0
+ }
+ ,
+ {
+ nx, 1, "jsr", jsr, 0, 0
+ }
+ ,
+ {
+ nx, 1, "jmp", jmp, 0, 0
+ }
+ ,
+ {
+ nx, 0, "rts", rts, 0, 0
+ }
+ ,
+ {
+ nx, 0, "rte", rte, 0, 0
+ }
+ ,
+ {
+ nx, 1, "andc", andc, 0, 0
+ }
+ ,
+ {
+ sf, 1, "shal", shal, 0, 0
+ }
+ ,
+ {
+ sf, 1, "shar", shar, 0, 0
+ }
+ ,
+ {
+ sf, 1, "shll", shll, 0, 0
+ }
+ ,
+ {
+ sf, 1, "shlr", shlr, 0, 0
+ }
+ ,
+ {
+ sf, 1, "rotxl", rotxl, 0, 0
+ }
+ ,
+ {
+ sf, 1, "rotxr", rotxr, 0, 0
+ }
+ ,
+ {
+ sf, 1, "rotl", rotl, 0, 0
+ }
+ ,
+ {
+ sf, 1, "rotr", rotr, 0, 0
+ }
+ ,
+ {
+ lf, 1, "xor", log, "^", 0
+ }
+ ,
+ {
+ lf, 1, "and", log, "&", 0
+ }
+ ,
+ {
+ lf, 1, "or", log, "|", 0
+ }
+ ,
+ {
+ lf, 1, "not", ulog, " ~", 0
+ }
+ ,
+ {
+ lf, 1, "neg", ulog, " - ", 0
+ }
+ ,
+ {
+ nx, 1, "adds", adds, "dst = srca + srcb", 0
+ }
+ ,
+ {
+ nx, 1, "subs", adds, "srca = -srca; dst = srcb + srca", 0
+ }
+ ,
+ {
+ af8, 1, "add.b", add, "dst = srca + srcb", 8
+ }
+ ,
+ {
+ af16, 1, "add.w", add, "dst = srca + srcb", 16
+ }
+ ,
+ {
+ af16, 1, "sub.w", add, "srca = -srca; dst = srcb + srca", 16
+ }
+ ,
+ {
+ af8, 1, "sub.b", add, "srca = -srca; dst = srcb + srca", 8
+ }
+ ,
+ {
+ af8, 1, "addx", addx, 0, 8
+ }
+ ,
+ {
+ af8, 1, "subx", subx, 0, 8
+ }
+ ,
+ {
+ af8, 0, "cmp.b", cmp, 0, 8
+ }
+ ,
+ {
+ af16, 0, "cmp.w", cmp, 0, 16
+ }
+ ,
+ {
+ nx, 1, "sleep", esleep, 0, 0
+ }
+ ,
+ {
+ nx, 0, "bpt", bpt, 0, 8
+ }
+ ,
+ {
+ nx, 0, "divxu", divxu, 0, 0
+ }
+ ,
+ {
+ nx, 0, "mulxu", mulxu, 0, 0
+ }
+ ,
+ {
+ mf8, 1, "mov.b", mov, 0, 8
+ }
+ ,
+ {
+ mf8, 1, "movtpe", mov, 0, 8
+ }
+ ,
+ {
+ mf8, 1, "movfpe", mov, 0, 8
+ }
+ ,
+ {
+ mf16, 1, "mov.w", mov, 0, 16
+ }
+ ,
+ {
+ 0
+ }
};
static
@@ -741,7 +961,7 @@ edo (p)
if (table[i].decode)
decode (p, 1, table[i].size);
printf ("cycles += %d;\n", p->time);
- printf ("npc = pc + %d;\n", p->length/2);
+ printf ("npc = pc + %d;\n", p->length / 2);
table[i].func (p, table[i].arg, table[i].size);
if (table[i].decode)
decode (p, 0, table[i].size);
@@ -849,17 +1069,22 @@ owrite (i)
if (mask0[c] | mask1[c])
{
int sh;
+
if (needand)
printf ("\n&&");
- if (c & 1) sh = 0;else sh = 8;
- if (c/2 == 0 && sh == 0)
- printf("((b1&0x%x)==0x%x)", mask0[c]| mask1[c],
- mask1[c]);
- else {
- printf ("((pc[%d]&(0x%02x<<%d))==(0x%x<<%d))",
- c/2, mask0[c] | mask1[c],sh,
- mask1[c],sh);
- }
+ if (c & 1)
+ sh = 0;
+ else
+ sh = 8;
+ if (c / 2 == 0 && sh == 0)
+ printf ("((b1&0x%x)==0x%x)", mask0[c] | mask1[c],
+ mask1[c]);
+ else
+ {
+ printf ("((pc[%d]&(0x%02x<<%d))==(0x%x<<%d))",
+ c / 2, mask0[c] | mask1[c], sh,
+ mask1[c], sh);
+ }
needand = 1;
}