diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index ec5f52b74fb2eac4d1c5b2152ad1c173d4bb2e1e..4d2860f043deda81eb05b093186722953d6775c3 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,8 @@
+2005-07-16  Jim Blandy  <jimb@redhat.com>
+
+	* m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
+	to represent isa sets.
+
 2005-07-15  Jim Blandy  <jimb@redhat.com>
 
 	* m32c.cpu, m32c.opc: Fix copyright.
diff --git a/cpu/m32c.opc b/cpu/m32c.opc
index 04baa9c5ebf5f839116b9d3070e712b8bbdcadb1..3824118ddce008837d9eeb45182691d10d997bba 100644
--- a/cpu/m32c.opc
+++ b/cpu/m32c.opc
@@ -866,14 +866,14 @@ m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
 			  const CGEN_INSN *insn)
 {
   int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
-  CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
+  int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA);
 
   /* If attributes are absent, assume no restriction. */
   if (machs == 0)
     machs = ~0;
 
-  return (machs & cd->machs)
-    && cgen_bitset_intersect_p (& isas, cd->isas);
+  return ((machs & cd->machs)
+	  && (isas & cd->isas));
 }
 
 /* Parse a set of registers, R0,R1,A0,A1,SB,FB.  */