From 3e1056a1a6336f289d3f0def8f6a3632c8a75393 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Mon, 23 Dec 2019 18:04:12 +1030
Subject: [PATCH] ubsan: iq2000: left shift of negative value

cpu/
	* iq2000.cpu (f-offset): Avoid left shift of negative values.
opcodes/
	* iq2000-ibld.c: Regenerate.
---
 cpu/ChangeLog         | 4 ++++
 cpu/iq2000.cpu        | 2 +-
 opcodes/ChangeLog     | 4 ++++
 opcodes/iq2000-ibld.c | 2 +-
 4 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 1729efd266c..3e6a8d8c4d0 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,7 @@
+2019-12-23  Alan Modra  <amodra@gmail.com>
+
+	* iq2000.cpu (f-offset): Avoid left shift of negative values.
+
 2019-12-20  Alan Modra  <amodra@gmail.com>
 
 	* or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
diff --git a/cpu/iq2000.cpu b/cpu/iq2000.cpu
index e25ba69392b..cb9cfae1d43 100644
--- a/cpu/iq2000.cpu
+++ b/cpu/iq2000.cpu
@@ -207,7 +207,7 @@
 (df  f-offset "pc offset field"                (PCREL-ADDR) 15 16 INT
      ; Actually, this is relative to the address of the delay slot.
      ((value pc) (sra SI (sub SI value pc) 2))
-     ((value pc) (add SI (sll SI value 2) (add pc 4))))
+     ((value pc) (add SI (mul SI value 4) (add pc 4))))
 
 ; Instruction fields that scarcely appear in instructions.
 
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 1c5592ae26d..c3a97523bcb 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2019-12-23  Alan Modra  <amodra@gmail.com>
+
+	* iq2000-ibld.c: Regenerate.
+
 2019-12-23  Alan Modra  <amodra@gmail.com>
 
 	* d30v-dis.c (extract_value): Make num param a uint64_t, constify
diff --git a/opcodes/iq2000-ibld.c b/opcodes/iq2000-ibld.c
index 34482b366a6..3059fe167a7 100644
--- a/opcodes/iq2000-ibld.c
+++ b/opcodes/iq2000-ibld.c
@@ -838,7 +838,7 @@ iq2000_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, pc, & value);
-        value = ((((value) << (2))) + (((pc) + (4))));
+        value = ((((value) * (4))) + (((pc) + (4))));
         fields->f_offset = value;
       }
       break;
-- 
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