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Due to inactivity, this project is scheduled to be deleted on 2036-02-08. Why is this scheduled?

L

LearnV

Project information

LearnV : Training labs for handling both hardware and software issues when designing a System on a Chip. This is done using the Berkeley's design platform Rocket Chip and the ISA processor RISC V

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README

Created on

January 22, 2021

Copy SSH clone URLgit@gricad-gitlab.univ-grenoble-alpes.fr:maillefa/LearnV.git
Copy HTTPS clone URLhttps://gricad-gitlab.univ-grenoble-alpes.fr/maillefa/LearnV.git