Commit 0b0a298c authored by Jerome Ferrari's avatar Jerome Ferrari
Browse files

Update WinKy_PCB_Design/WinKy_PCB_V2b/fp-info-cache,...

Update WinKy_PCB_Design/WinKy_PCB_V2b/fp-info-cache, WinKy_PCB_Design/WinKy_PCB_V2b/fp-lib-table, WinKy_PCB_Design/WinKy_PCB_V2b/KA75330ZTA.lib, WinKy_PCB_Design/WinKy_PCB_V2b/sym-lib-table, WinKy_PCB_Design/WinKy_PCB_V2b/KA75330ZTA.step, WinKy_PCB_Design/WinKy_PCB_V2b/TO92260P520H877-3.kicad_mod, WinKy_PCB_Design/WinKy_PCB_V2b/WinKy-PCB-v2.kicad_pcb-bak, WinKy_PCB_Design/WinKy_PCB_V2b/WinKy-PCB-v2b.kicad_pcb, WinKy_PCB_Design/WinKy_PCB_V2b/WinKy-PCB-v2b.lib, WinKy_PCB_Design/WinKy_PCB_V2b/WinKy-PCB-v2b.pro, WinKy_PCB_Design/WinKy_PCB_V2b/WinKy-PCB-v2b.sch, WinKy_PCB_Design/WinKy_PCB_V2b/WinKy-PCB-v2b.sch-bak, WinKy_PCB_Design/WinKy_PCB_V2b/WinKy-PCB-v2b-cache.lib, WinKy_PCB_Design/WinKy_PCB_V2b/WinKy-PCB-v2b-rescue.lib
parent a16de069
EESchema-LIBRARY Version 2.3
#encoding utf-8
#(c) SnapEDA 2016 (snapeda.com)
#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
#
# KA75330ZTA
#
DEF KA75330ZTA U 0 40 Y Y 1 L N
F0 "U" -300 230 50 H V L BNN
F1 "KA75330ZTA" -300 -300 50 H V L BNN
F2 "TO92260P520H877-3" 0 0 50 H I L BNN
F3 "" 0 0 50 H I L BNN
F4 "ON Semiconductor" 0 0 50 H I L BNN "MANUFACTURER"
F5 "1.1" 0 0 50 H I L BNN "PARTREV"
F6 "8.77mm" 0 0 50 H I L BNN "MAXIMUM_PACKAGE_HEIGHT"
F7 "IPC7351B" 0 0 50 H I L BNN "STANDARD"
DRAW
S -300 -200 300 200 0 0 10 f
X IN 1 -500 100 200 R 40 40 0 0 I
X OUT 3 500 100 200 L 40 40 0 0 O
X GND 2 500 -100 200 L 40 40 0 0 W
ENDDRAW
ENDDEF
#
# End Library
\ No newline at end of file
This diff is collapsed.
(module TO92260P520H877-3 (layer F.Cu) (tedit 61AA1E10)
(descr "")
(fp_text reference REF** (at 0.237 -3.885 0) (layer F.SilkS)
(effects (font (size 1.0 1.0) (thickness 0.15)))
)
(fp_text value TO92260P520H877-3 (at 7.7125 4.0175 0) (layer F.Fab)
(effects (font (size 1.0 1.0) (thickness 0.15)))
)
(pad 1 thru_hole rect (at -2.6 0.9875) (size 1.448 1.448) (drill 0.94) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 0.0 0.9875) (size 1.448 1.448) (drill 0.94) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 2.6 0.9875) (size 1.448 1.448) (drill 0.94) (layers *.Cu *.Mask))
(fp_circle (center -4.1 1.0) (end -4.0 1.0) (layer F.SilkS) (width 0.2))
(fp_circle (center -4.1 1.0) (end -4.0 1.0) (layer F.Fab) (width 0.2))
(fp_line (start -1.886 2.548) (end 1.886 2.548) (layer F.Fab) (width 0.127))
(fp_arc (start 0.0 0.758252827176) (end 1.886 2.548) (angle -267.0) (layer F.Fab) (width 0.127))
(fp_arc (start 0.000513792353902 0.760869440513) (end 2.401 -0.239) (angle -137.0) (layer F.SilkS) (width 0.127))
(fp_arc (start 0.567912029635 0.306310794714) (end -1.885 2.548) (angle 10.0) (layer F.SilkS) (width 0.127))
(fp_arc (start -0.650137421906 0.270235663957) (end 1.886 2.548) (angle -10.0) (layer F.SilkS) (width 0.127))
(fp_line (start -1.886 2.548) (end 1.886 2.548) (layer F.SilkS) (width 0.127))
(fp_line (start -3.575 2.8) (end 3.575 2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.575 2.8) (end -3.575 0.758) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.575 2.8) (end 3.575 0.758) (layer F.CrtYd) (width 0.05))
(fp_arc (start 0.0 0.758) (end 3.575 0.758) (angle -180.0) (layer F.CrtYd) (width 0.05))
)
\ No newline at end of file
This diff is collapsed.
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_Conn_01x03_Male
#
DEF Connector_Conn_01x03_Male J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Connector_Conn_01x03_Male" 0 -200 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S 34 -95 0 -105 1 1 6 F
S 34 5 0 -5 1 1 6 F
S 34 105 0 95 1 1 6 F
P 2 1 1 6 50 -100 34 -100 N
P 2 1 1 6 50 0 34 0 N
P 2 1 1 6 50 100 34 100 N
X Pin_1 1 200 100 150 L 50 50 1 1 P
X Pin_2 2 200 0 150 L 50 50 1 1 P
X Pin_3 3 200 -100 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Conn_01x04_Female
#
DEF Connector_Conn_01x04_Female J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Connector_Conn_01x04_Female" 0 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
A 0 -200 20 901 -901 1 1 6 N 0 -180 0 -220
A 0 -100 20 901 -901 1 1 6 N 0 -80 0 -120
A 0 0 20 901 -901 1 1 6 N 0 20 0 -20
A 0 100 20 901 -901 1 1 6 N 0 120 0 80
P 2 1 1 6 -50 -200 -20 -200 N
P 2 1 1 6 -50 -100 -20 -100 N
P 2 1 1 6 -50 0 -20 0 N
P 2 1 1 6 -50 100 -20 100 N
X Pin_1 1 -200 100 150 R 50 50 1 1 P
X Pin_2 2 -200 0 150 R 50 50 1 1 P
X Pin_3 3 -200 -100 150 R 50 50 1 1 P
X Pin_4 4 -200 -200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Conn_01x04_Male
#
DEF Connector_Conn_01x04_Male J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Connector_Conn_01x04_Male" 0 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S 34 -195 0 -205 1 1 6 F
S 34 -95 0 -105 1 1 6 F
S 34 5 0 -5 1 1 6 F
S 34 105 0 95 1 1 6 F
P 2 1 1 6 50 -200 34 -200 N
P 2 1 1 6 50 -100 34 -100 N
P 2 1 1 6 50 0 34 0 N
P 2 1 1 6 50 100 34 100 N
X Pin_1 1 200 100 150 L 50 50 1 1 P
X Pin_2 2 200 0 150 L 50 50 1 1 P
X Pin_3 3 200 -100 150 L 50 50 1 1 P
X Pin_4 4 200 -200 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C
#
DEF Device_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_CP
#
DEF Device_CP C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_CP" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
CP_*
$ENDFPLIST
DRAW
S -90 20 90 40 0 1 0 N
S 90 -20 -90 -40 0 1 0 F
P 2 0 1 0 -70 90 -30 90 N
P 2 0 1 0 -50 110 -50 70 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "Device_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# KA75330ZTA_KA75330ZTA
#
DEF KA75330ZTA_KA75330ZTA U 0 40 Y Y 1 L N
F0 "U" -300 230 50 H V L BNN
F1 "KA75330ZTA_KA75330ZTA" -300 -300 50 H V L BNN
F2 "TO92260P520H877-3" 0 0 50 H I L BNN
F3 "" 0 0 50 H I L BNN
F4 "ON Semiconductor" 0 0 50 H I L BNN "MANUFACTURER"
F5 "1.1" 0 0 50 H I L BNN "PARTREV"
F6 "8.77mm" 0 0 50 H I L BNN "MAXIMUM_PACKAGE_HEIGHT"
F7 "IPC7351B" 0 0 50 H I L BNN "STANDARD"
DRAW
S -300 -200 300 200 0 0 10 f
X IN 1 -500 100 200 R 40 40 0 0 I
X GND 2 500 -100 200 L 40 40 0 0 W
X OUT 3 500 100 200 L 40 40 0 0 O
ENDDRAW
ENDDEF
#
# Regulator_Linear_MCP1700-3302E_TO92
#
DEF Regulator_Linear_MCP1700-3302E_TO92 U 0 10 Y Y 1 F N
F0 "U" -150 -125 50 H V C CNN
F1 "Regulator_Linear_MCP1700-3302E_TO92" 0 -125 50 H V L CNN
F2 "Package_TO_SOT_THT:TO-92_Inline" 0 -200 50 H I C CIN
F3 "" 0 0 50 H I C CNN
ALIAS LM79L12_TO92 LM79L15_TO92 L79L05_TO92 L79L08_TO92 L79L12_TO92 L79L15_TO92 MCP1700-3002E_TO92 MCP1700-1202E_TO92 MCP1700-1802E_TO92 MCP1700-2502E_TO92 MCP1700-2802E_TO92 MCP1700-3302E_TO92 MCP1700-5002E_TO92
$FPLIST
TO?92*
$ENDFPLIST
DRAW
S -200 200 200 -75 0 1 10 f
X GND 1 0 300 100 D 50 50 1 1 W
X VI 2 -300 0 100 R 50 50 1 1 W
X VO 3 300 0 100 L 50 50 1 1 w
ENDDRAW
ENDDEF
#
# WinKy-PCB-v2b-rescue_Diode_1N4148-LoKy-PCB-v2b
#
DEF WinKy-PCB-v2b-rescue_Diode_1N4148-LoKy-PCB-v2b D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "WinKy-PCB-v2b-rescue_Diode_1N4148-LoKy-PCB-v2b" 0 -100 50 H V C CNN
F2 "Diode_THT:D_DO-35_SOD27_P7.62mm_Horizontal" 0 -175 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
D*DO?35*
$ENDFPLIST
DRAW
P 2 0 1 10 -50 50 -50 -50 N
P 2 0 1 0 50 0 -50 0 N
P 4 0 1 10 50 50 50 -50 -50 0 50 50 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# WinKy-PCB-v2b-rescue_ESP-01v090-ESP8266
#
DEF WinKy-PCB-v2b-rescue_ESP-01v090-ESP8266 U 0 40 Y Y 1 F N
F0 "U" 0 -100 50 H V C CNN
F1 "WinKy-PCB-v2b-rescue_ESP-01v090-ESP8266" 0 100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
ESP-01*
$ENDFPLIST
DRAW
S -650 -350 650 350 1 0 0 N
X UTXD 1 -950 150 300 R 50 50 1 1 O
X GND 2 950 150 300 L 50 50 1 1 W
X CH_PD 3 -950 50 300 R 50 50 1 1 I
X GPIO2 4 950 50 300 L 50 50 1 1 T
X RST 5 -950 -50 300 R 50 50 1 1 I
X GPIO0 6 950 -50 300 L 50 50 1 1 T
X VCC 7 -950 -150 300 R 50 50 1 1 W
X URXD 8 950 -150 300 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# WinKy-PCB-v2b-rescue_LOGO-LoKy-PCB-v2b
#
DEF WinKy-PCB-v2b-rescue_LOGO-LoKy-PCB-v2b #G 0 40 Y Y 1 F N
F0 "#G" 0 -180 60 H I C CNN
F1 "WinKy-PCB-v2b-rescue_LOGO-LoKy-PCB-v2b" 0 180 60 H I C CNN
F2 "" 0 0 113 H I C CNN
F3 "" 0 0 113 H I C CNN
DRAW
P 14 0 0 1 -264 -203 -240 -182 -225 -166 -212 -144 -215 -131 -233 -128 -237 -129 -258 -141 -277 -161 -290 -182 -290 -199 -287 -203 -278 -209 -264 -203 F
P 20 0 0 1 -178 -164 -158 -145 -157 -144 -142 -120 -138 -102 -146 -95 -155 -97 -175 -112 -182 -121 -169 -121 -163 -116 -158 -121 -163 -126 -169 -121 -182 -121 -193 -133 -200 -151 -200 -153 -194 -167 -178 -164 F
P 31 0 0 1 -47 -94 -27 -89 -21 -80 -30 -68 -55 -60 -90 -56 -56 -42 -39 -33 -14 -10 -4 14 -10 36 -34 50 -64 50 -90 35 -97 27 -98 14 -87 11 -69 21 -57 27 -40 25 -32 11 -42 1 -64 -11 -83 -22 -109 -43 -129 -66 -137 -86 -132 -89 -111 -93 -79 -95 -47 -94 F
P 33 0 0 1 86 -90 95 -79 87 -68 62 -63 43 -60 34 -51 42 -41 66 -34 76 -32 92 -24 89 -15 66 -9 50 -6 45 0 56 13 73 24 101 32 117 34 126 42 126 43 116 51 94 52 67 47 45 36 38 31 20 5 9 -27 5 -58 11 -80 18 -85 39 -93 65 -95 86 -90 F
P 35 0 0 1 -185 -91 -163 -79 -145 -53 -126 -16 -154 -12 -158 -12 -181 -13 -189 -20 -180 -31 -178 -32 -171 -45 -181 -58 -202 -63 -213 -62 -219 -52 -216 -29 -210 -6 -201 13 -187 19 -162 16 -155 15 -132 16 -128 25 -142 42 -155 48 -184 48 -212 39 -230 23 -237 6 -246 -28 -247 -60 -241 -81 -224 -90 -196 -93 -185 -91 F
P 65 0 0 1 260 -91 279 -88 289 -80 295 -67 296 -63 304 -37 300 -24 284 -21 271 -18 270 -5 271 3 264 10 259 9 252 -5 245 -17 218 -22 201 -23 194 -25 205 -32 208 -33 218 -39 209 -41 198 -44 179 -58 170 -67 156 -73 195 -73 195 -63 197 -60 206 -53 207 -53 208 -58 231 -58 237 -53 242 -58 237 -63 231 -58 208 -58 210 -63 210 -66 206 -69 259 -69 260 -53 262 -46 272 -33 281 -34 282 -49 279 -58 266 -71 259 -69 206 -69 199 -74 195 -73 156 -73 150 -60 153 -29 156 -6 154 7 147 4 145 1 136 -20 129 -50 124 -93 227 -93 260 -91 F
P 70 0 0 1 241 23 256 37 273 56 288 76 295 87 290 90 274 85 262 78 250 76 242 85 231 110 229 117 212 141 193 145 172 129 164 121 200 121 205 126 210 121 205 116 200 121 164 121 163 120 160 121 160 125 156 145 146 170 133 191 122 200 111 196 92 182 74 162 62 144 60 133 62 130 58 128 51 127 33 115 13 96 -4 74 -11 57 -7 44 8 45 31 62 62 95 85 120 104 140 114 147 117 145 125 132 137 132 142 137 147 132 142 126 137 132 125 132 127 129 140 103 145 91 156 71 164 68 173 77 180 85 191 93 202 84 216 58 220 51 231 30 237 21 241 23 F
ENDDRAW
ENDDEF
#
# WinKy-PCB-v2b-rescue_NCP1117-3.3_TO252
#
DEF WinKy-PCB-v2b-rescue_NCP1117-3.3_TO252 U 0 10 Y Y 1 F N
F0 "U" -150 125 50 H V C CNN
F1 "WinKy-PCB-v2b-rescue_NCP1117-3.3_TO252" 0 125 50 H V L CNN
F2 "Package_TO_SOT_SMD:TO-252-2" 0 225 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS NCP1117-1.8_TO252 NCP1117-1.9_TO252 NCP1117-2.0_TO252 NCP1117-2.5_TO252 NCP1117-2.85_TO252 NCP1117-3.3_TO252 NCP1117-5.0_TO252
$FPLIST
TO?252*
$ENDFPLIST
DRAW
S -200 75 200 -200 0 1 10 f
X VIn 1 0 -300 100 U 50 50 1 1 W
X GND 2 300 0 100 L 50 50 1 1 w
X VOut 3 -300 0 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# WinKy-PCB-v2b-rescue_PC814_PC814-LoKy-PCB-v2b
#
DEF WinKy-PCB-v2b-rescue_PC814_PC814-LoKy-PCB-v2b OK 0 40 Y N 1 L N
F0 "OK" -275 225 50 H V L BNN
F1 "WinKy-PCB-v2b-rescue_PC814_PC814-LoKy-PCB-v2b" -275 -300 50 H V L BNN
F2 "DIL04" 0 0 50 H I L BNN
F3 "" 0 0 50 H I L BNN
F4 "9707662" 0 0 50 H I L BNN "OC_FARNELL"
F5 "unknown" 0 0 50 H I L BNN "OC_NEWARK"
DRAW
C -125 -100 10 0 0 16 N
C -125 100 10 0 0 16 N
S -275 -200 375 200 0 0 16 f
S 185 -100 215 100 0 0 0 F
P 2 0 0 10 -175 -50 -125 -50 N
P 2 0 0 10 -175 -50 -125 50 N
P 2 0 0 10 -175 50 -125 50 N
P 2 0 0 6 -125 -100 -300 -100 N
P 2 0 0 6 -125 -100 -125 -50 N
P 2 0 0 6 -125 -100 0 -100 N
P 2 0 0 10 -125 -50 -125 50 N
P 2 0 0 10 -125 -50 -75 -50 N
P 2 0 0 10 -125 50 -75 -50 N
P 2 0 0 10 -125 50 -75 50 N
P 2 0 0 6 -125 100 -300 100 N
P 2 0 0 6 -125 100 -125 50 N
P 2 0 0 6 -125 100 0 100 N
P 2 0 0 6 0 -100 0 -50 N
P 2 0 0 10 0 -50 -50 -50 N
P 2 0 0 10 0 -50 -50 50 N
P 2 0 0 10 0 50 -50 50 N
P 2 0 0 10 0 50 0 -50 N
P 2 0 0 6 0 100 0 50 N
P 2 0 0 10 50 -50 0 -50 N
P 2 0 0 10 50 50 0 -50 N
P 2 0 0 10 50 50 0 50 N
P 2 0 0 6 75 0 130 55 N
P 2 0 0 6 80 -45 135 10 N
P 2 0 0 6 95 40 115 20 N
P 2 0 0 6 100 -5 120 -25 N
P 2 0 0 6 115 20 130 55 N
P 2 0 0 6 120 -25 135 10 N
P 2 0 0 6 130 55 95 40 N
P 2 0 0 6 135 10 100 -5 N
P 2 0 0 6 200 0 290 -90 N
P 2 0 0 6 240 -70 270 -40 N
P 2 0 0 6 270 -40 290 -90 N
P 2 0 0 6 290 -90 240 -70 N
P 2 0 0 6 290 -90 300 -100 N
P 2 0 0 6 300 -100 400 -100 N
P 2 0 0 6 300 100 200 0 N
P 2 0 0 6 300 100 400 100 N
X ~ 1 -400 100 100 R 40 40 0 0 P
X ~ 2 -400 -100 100 R 40 40 0 0 P
X ~ 3 500 -100 100 L 40 40 0 0 P
X ~ 4 500 100 100 L 40 40 0 0 P
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# ARDUINO_PRO_MINI_ARDUINO_PRO_MINI-LoKy-PCB-v2b
#
DEF ARDUINO_PRO_MINI_ARDUINO_PRO_MINI-LoKy-PCB-v2b U 0 40 Y Y 1 L N
F0 "U" -500 1250 50 H V L BNN
F1 "ARDUINO_PRO_MINI_ARDUINO_PRO_MINI-LoKy-PCB-v2b" -500 -1300 50 H V L BNN
F2 "MODULE_ARDUINO_PRO_MINI" 0 0 50 H I L BNN
F3 "" 0 0 50 H I L BNN
F4 "SparkFun Electronics" 0 0 50 H I L BNN "MANUFACTURER"
F5 "N/A" 0 0 50 H I L BNN "PARTREV"
F6 "Manufacturer Recommendations" 0 0 50 H I L BNN "STANDARD"
F7 "N/A" 0 0 50 H I L BNN "MAXIMUM_PACKAGE_HEIGHT"
DRAW
S -500 -1200 500 1200 0 0 10 f
X DTR JP1_1 700 700 200 L 40 40 0 0 I
X TXO JP1_2 700 600 200 L 40 40 0 0 B
X RXI JP1_3 700 500 200 L 40 40 0 0 B
X VCC JP1_4 700 1100 200 L 40 40 0 0 W
X GND JP1_5 700 -900 200 L 40 40 0 0 W
X GND JP1_6 700 -900 200 L 40 40 0 0 W
X A4 JP2_1 -700 400 200 R 40 40 0 0 B
X A5 JP2_2 -700 300 200 R 40 40 0 0 B
X A6 JP3_1 -700 700 200 R 40 40 0 0 I
X A7 JP3_2 -700 600 200 R 40 40 0 0 I
X RAW JP6_1 700 900 200 L 40 40 0 0 W
X MISO JP6_10 -700 -500 200 R 40 40 0 0 B
X MOSI JP6_11 -700 -600 200 R 40 40 0 0 B
X D10 JP6_12 -700 -700 200 R 40 40 0 0 B
X GND_1 JP6_2 700 -1000 200 L 40 40 0 0 W
X RST_1 JP6_3 -700 100 200 R 40 40 0 0 I
X VCC_1 JP6_4 700 1000 200 L 40 40 0 0 W
X A3 JP6_5 -700 -300 200 R 40 40 0 0 B
X A2 JP6_6 -700 -200 200 R 40 40 0 0 B
X A1 JP6_7 -700 -100 200 R 40 40 0 0 B
X A0 JP6_8 -700 0 200 R 40 40 0 0 B
X SCK JP6_9 -700 -400 200 R 40 40 0 0 B
X D9 JP7_1 700 -700 200 L 40 40 0 0 B
X RST_2 JP7_10 700 300 200 L 40 40 0 0 I
X RXI_2 JP7_11 700 100 200 L 40 40 0 0 B
X TXO_2 JP7_12 700 200 200 L 40 40 0 0 B
X D8 JP7_2 700 -600 200 L 40 40 0 0 B
X D7 JP7_3 700 -500 200 L 40 40 0 0 B
X D6 JP7_4 700 -400 200 L 40 40 0 0 B
X D5 JP7_5 700 -300 200 L 40 40 0 0 B
X D4 JP7_6 700 -200 200 L 40 40 0 0 B
X D3 JP7_7 700 -100 200 L 40 40 0 0 B
X D2 JP7_8 700 0 200 L 40 40 0 0 B
X GND_2 JP7_9 700 -1100 200 L 40 40 0 0 W
ENDDRAW
ENDDEF
#
# Diode_1N4148-LoKy-PCB-v2b
#
DEF Diode_1N4148-LoKy-PCB-v2b D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "Diode_1N4148-LoKy-PCB-v2b" 0 -100 50 H V C CNN
F2 "Diode_THT:D_DO-35_SOD27_P7.62mm_Horizontal" 0 -175 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
D*DO?35*
$ENDFPLIST
DRAW
P 2 0 1 10 -50 50 -50 -50 N
P 2 0 1 0 50 0 -50 0 N
P 4 0 1 10 50 50 50 -50 -50 0 50 50 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# ESP-01v090-ESP8266
#
DEF ESP-01v090-ESP8266 U 0 40 Y Y 1 F N
F0 "U" 0 -100 50 H V C CNN
F1 "ESP-01v090-ESP8266" 0 100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
ESP-01*
$ENDFPLIST
DRAW
S -650 -350 650 350 1 0 0 N
X UTXD 1 -950 150 300 R 50 50 1 1 O
X GND 2 950 150 300 L 50 50 1 1 W
X CH_PD 3 -950 50 300 R 50 50 1 1 I
X GPIO2 4 950 50 300 L 50 50 1 1 T
X RST 5 -950 -50 300 R 50 50 1 1 I
X GPIO0 6 950 -50 300 L 50 50 1 1 T
X VCC 7 -950 -150 300 R 50 50 1 1 W
X URXD 8 950 -150 300 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# LOGO-LoKy-PCB-v2b
#
DEF LOGO-LoKy-PCB-v2b #G 0 40 Y Y 1 F N
F0 "#G" 0 -180 60 H I C CNN
F1 "LOGO-LoKy-PCB-v2b" 0 180 60 H I C CNN
F2 "" 0 0 113 H I C CNN
F3 "" 0 0 113 H I C CNN
DRAW
P 14 0 0 1 -264 -203 -240 -182 -225 -166 -212 -144 -215 -131 -233 -128 -237 -129 -258 -141 -277 -161 -290 -182 -290 -199 -287 -203 -278 -209 -264 -203 F
P 20 0 0 1 -178 -164 -158 -145 -157 -144 -142 -120 -138 -102 -146 -95 -155 -97 -175 -112 -182 -121 -169 -121 -163 -116 -158 -121 -163 -126 -169 -121 -182 -121 -193 -133 -200 -151 -200 -153 -194 -167 -178 -164 F
P 31 0 0 1 -47 -94 -27 -89 -21 -80 -30 -68 -55 -60 -90 -56 -56 -42 -39 -33 -14 -10 -4 14 -10 36 -34 50 -64 50 -90 35 -97 27 -98 14 -87 11 -69 21 -57 27 -40 25 -32 11 -42 1 -64 -11 -83 -22 -109 -43 -129 -66 -137 -86 -132 -89 -111 -93 -79 -95 -47 -94 F
P 33 0 0 1 86 -90 95 -79 87 -68 62 -63 43 -60 34 -51 42 -41 66 -34 76 -32 92 -24 89 -15 66 -9 50 -6 45 0 56 13 73 24 101 32 117 34 126 42 126 43 116 51 94 52 67 47 45 36 38 31 20 5 9 -27 5 -58 11 -80 18 -85 39 -93 65 -95 86 -90 F
P 35 0 0 1 -185 -91 -163 -79 -145 -53 -126 -16 -154 -12 -158 -12 -181 -13 -189 -20 -180 -31 -178 -32 -171 -45 -181 -58 -202 -63 -213 -62 -219 -52 -216 -29 -210 -6 -201 13 -187 19 -162 16 -155 15 -132 16 -128 25 -142 42 -155 48 -184 48 -212 39 -230 23 -237 6 -246 -28 -247 -60 -241 -81 -224 -90 -196 -93 -185 -91 F
P 65 0 0 1 260 -91 279 -88 289 -80 295 -67 296 -63 304 -37 300 -24 284 -21 271 -18 270 -5 271 3 264 10 259 9 252 -5 245 -17 218 -22 201 -23 194 -25 205 -32 208 -33 218 -39 209 -41 198 -44 179 -58 170 -67 156 -73 195 -73 195 -63 197 -60 206 -53 207 -53 208 -58 231 -58 237 -53 242 -58 237 -63 231 -58 208 -58 210 -63 210 -66 206 -69 259 -69 260 -53 262 -46 272 -33 281 -34 282 -49 279 -58 266 -71 259 -69 206 -69 199 -74 195 -73 156 -73 150 -60 153 -29 156 -6 154 7 147 4 145 1 136 -20 129 -50 124 -93 227 -93 260 -91 F
P 70 0 0 1 241 23 256 37 273 56 288 76 295 87 290 90 274 85 262 78 250 76 242 85 231 110 229 117 212 141 193 145 172 129 164 121 200 121 205 126 210 121 205 116 200 121 164 121 163 120 160 121 160 125 156 145 146 170 133 191 122 200 111 196 92 182 74 162 62 144 60 133 62 130 58 128 51 127 33 115 13 96 -4 74 -11 57 -7 44 8 45 31 62 62 95 85 120 104 140 114 147 117 145 125 132 137 132 142 137 147 132 142 126 137 132 125 132 127 129 140 103 145 91 156 71 164 68 173 77 180 85 191 93 202 84 216 58 220 51 231 30 237 21 241 23 F
ENDDRAW
ENDDEF
#
# NCP1117-1.5_TO252
#
DEF NCP1117-1.5_TO252 U 0 10 Y Y 1 F N
F0 "U" -150 125 50 H V C CNN
F1 "NCP1117-1.5_TO252" 0 125 50 H V L CNN
F2 "Package_TO_SOT_SMD:TO-252-2" 0 225 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS NCP1117-1.8_TO252 NCP1117-1.9_TO252 NCP1117-2.0_TO252 NCP1117-2.5_TO252 NCP1117-2.85_TO252 NCP1117-3.3_TO252 NCP1117-5.0_TO252
$FPLIST
TO?252*
$ENDFPLIST
DRAW
S -200 75 200 -200 0 1 10 f
X VIn 1 0 -300 100 U 50 50 1 1 W
X GND 2 300 0 100 L 50 50 1 1 w
X VOut 3 -300 0 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# NCP1117-3.3_TO252-Regulator_Linear
#
DEF NCP1117-3.3_TO252-Regulator_Linear U 0 10 Y Y 1 F N
F0 "U" -150 125 50 H V C CNN
F1 "NCP1117-3.3_TO252-Regulator_Linear" 0 125 50 H V L CNN
F2 "Package_TO_SOT_SMD:TO-252-2" 0 225 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TO?252*
$ENDFPLIST
DRAW
S -200 75 200 -200 0 1 10 f
X GND 1 0 -300 100 U 50 50 1 1 W
X VO 2 300 0 100 L 50 50 1 1 w
X VI 3 -300 0 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# PC814_PC814-LoKy-PCB-v2b
#
DEF PC814_PC814-LoKy-PCB-v2b OK 0 40 Y N 1 L N
F0 "OK" -275 225 50 H V L BNN
F1 "PC814_PC814-LoKy-PCB-v2b" -275 -300 50 H V L BNN
F2 "DIL04" 0 0 50 H I L BNN
F3 "" 0 0 50 H I L BNN
F4 "9707662" 0 0 50 H I L BNN "OC_FARNELL"
F5 "unknown" 0 0 50 H I L BNN "OC_NEWARK"
DRAW
C -125 -100 10 0 0 16 N
C -125 100 10 0 0 16 N
S -275 -200 375 200 0 0 16 f
S 185 -100 215 100 0 0 0 F
P 2 0 0 10 -175 -50 -125 -50 N
P 2 0 0 10 -175 -50 -125 50 N
P 2 0 0 10 -175 50 -125 50 N
P 2 0 0 6 -125 -100 -300 -100 N
P 2 0 0 6 -125 -100 -125 -50 N
P 2 0 0 6 -125 -100 0 -100 N
P 2 0 0 10 -125 -50 -125 50 N
P 2 0 0 10 -125 -50 -75 -50 N
P 2 0 0 10 -125 50 -75 -50 N
P 2 0 0 10 -125 50 -75 50 N
P 2 0 0 6 -125 100 -300 100 N
P 2 0 0 6 -125 100 -125 50 N
P 2 0 0 6 -125 100 0 100 N
P 2 0 0 6 0 -100 0 -50 N
P 2 0 0 10 0 -50 -50 -50 N
P 2 0 0 10 0 -50 -50 50 N
P 2 0 0 10 0 50 -50 50 N
P 2 0 0 10 0 50 0 -50 N
P 2 0 0 6 0 100 0 50 N
P 2 0 0 10 50 -50 0 -50 N
P 2 0 0 10 50 50 0 -50 N
P 2 0 0 10 50 50 0 50 N
P 2 0 0 6 75 0 130 55 N
P 2 0 0 6 80 -45 135 10 N
P 2 0 0 6 95 40 115 20 N
P 2 0 0 6 100 -5 120 -25 N
P 2 0 0 6 115 20 130 55 N
P 2 0 0 6 120 -25 135 10 N
P 2 0 0 6 130 55 95 40 N
P 2 0 0 6 135 10 100 -5 N
P 2 0 0 6 200 0 290 -90 N
P 2 0 0 6 240 -70 270 -40 N
P 2 0 0 6 270 -40 290 -90 N
P 2 0 0 6 290 -90 240 -70 N
P 2 0 0 6 290 -90 300 -100 N
P 2 0 0 6 300 -100 400 -100 N
P 2 0 0 6 300 100 200 0 N
P 2 0 0 6 300 100 400 100 N
X ~ 1 -400 100 100 R 40 40 0 0 P
X ~ 2 -400 -100 100 R 40 40 0 0 P
X ~ 3 500 -100 100 L 40 40 0 0 P
X ~ 4 500 100 100 L 40 40 0 0 P
ENDDRAW
ENDDEF
#
# Passive_Antenna_Helical-LoKy-PCB-v2b
#
DEF Passive_Antenna_Helical-LoKy-PCB-v2b AE 0 40 N N 1 F N
F0 "AE" 0 200 40 H V C CNN
F1 "Passive_Antenna_Helical-LoKy-PCB-v2b" 250 50 40 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
ANTENNA_HELICAL*
$ENDFPLIST
DRAW
P 2 0 1 0 0 150 0 100 N
P 4 0 1 0 0 100 -50 150 50 150 0 100 N
X In 1 0 0 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library
This diff is collapsed.
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# ARDUINO_PRO_MINI_ARDUINO_PRO_MINI
#
DEF ARDUINO_PRO_MINI_ARDUINO_PRO_MINI U 0 40 Y Y 1 L N
F0 "U" -500 1250 50 H V L BNN
F1 "ARDUINO_PRO_MINI_ARDUINO_PRO_MINI" -500 -1300 50 H V L BNN
F2 "MODULE_ARDUINO_PRO_MINI" 0 0 50 H I L BNN
F3 "" 0 0 50 H I L BNN
F4 "SparkFun Electronics" 0 0 50 H I L BNN "MANUFACTURER"